Patents by Inventor Ijaz Jafri

Ijaz Jafri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240077312
    Abstract: Systems and methods disclosed herein include a device with a bulk acoustic wave resonator and one or more trenches that are configured to impede the flow of acoustic energy to the bulk acoustic wave resonator.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Inventors: Diego EMILIO SERRANO, Sagnik PAL, Amir RAHAFROOZ, Thomas Kieran NUNAN, Ijaz JAFRI
  • Patent number: 11358858
    Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor layer having a first-type region and a second-type region that are stacked and interface with each other to form a p-n junction, the first-type region defining a first side of the semiconductor layer and the second-type region defining a second side of the semiconductor layer. The method further includes providing an insulating layer on the second side of the semiconductor layer and etching the semiconductor layer from the first side of the semiconductor layer toward the second side of the semiconductor layer to form a trench. The first-type region corresponds to one of a n-type region and a p-type region, and the second-type region corresponds to the other of the n-type region and the p-type region.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: June 14, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Amir Rahafrooz, Thomas Kieran Nunan, Diego Emilio Serrano, Ijaz Jafri
  • Publication number: 20210229978
    Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor layer having a first-type region and a second-type region that are stacked and interface with each other to form a p-n junction, the first-type region defining a first side of the semiconductor layer and the second-type region defining a second side of the semiconductor layer. The method further includes providing an insulating layer on the second side of the semiconductor layer and etching the semiconductor layer from the first side of the semiconductor layer toward the second side of the semiconductor layer to form a trench. The first-type region corresponds to one of a n-type region and a p-type region, and the second-type region corresponds to the other of the n-type region and the p-type region.
    Type: Application
    Filed: January 24, 2020
    Publication date: July 29, 2021
    Inventors: Amir RAHAFROOZ, Thomas Kieran NUNAN, Diego EMILIO SERRANO, Ijaz JAFRI
  • Patent number: 10082394
    Abstract: A MEMS BAW vibratory planar gyroscope having an in-plane electrode configuration for mode-alignment by utilizing alignment electrodes that have a height less than a full height of the gyroscope resonant body. Such alignment electrodes apply a force component that affects modes with both in-plane and out-of-plane movements. The gyroscope includes a resonant body having a height and a perimeter surface and electrodes disposed adjacent the exterior perimeter surface of the resonant body. At least one of the electrodes is an alignment electrode and has a height less than the height of the resonant body.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: September 25, 2018
    Assignee: PANASONIC CORPORATION
    Inventors: Amir Rahafrooz, Diego Emilio Serrano, Ijaz Jafri
  • Publication number: 20160349055
    Abstract: A MEMS BAW vibratory planar gyroscope having an in-plane electrode configuration for mode-alignment by utilizing alignment electrodes that have a height less than a full height of the gyroscope resonant body. Such alignment electrodes apply a force component that affects modes with both in-plane and out-of-plane movements. The gyroscope includes a resonant body having a height and a perimeter surface and electrodes disposed adjacent the exterior perimeter surface of the resonant body. At least one of the electrodes is an alignment electrode and has a height less than the height of the resonant body.
    Type: Application
    Filed: May 31, 2016
    Publication date: December 1, 2016
    Applicant: Qualtre, Inc.
    Inventors: Amir Rahafrooz, Diego Emilio Serrano, Ijaz Jafri
  • Publication number: 20160327390
    Abstract: A resonant gyroscope apparatus has a decoupling mechanism implemented with spring-like flexure members to effectively isolate an axis-symmetric bulk-acoustic wave (BAW) vibratory gyroscope from its substrate, thereby minimizing the effect that external sources of error have on offset and scale-factor. The spring-like structure enables degeneracy of in-plane resonance modes of the annulus and aids in decoupling the in-plane and out-of-plane resonance modes of the resonant annulus, thereby enabling the mode-matched and/or near mode-matched operation of the structure as a vibratory gyroscope in the pitch, roll and yaw-modes.
    Type: Application
    Filed: January 13, 2015
    Publication date: November 10, 2016
    Inventors: Diego E. Serrano, Mohammad F. Zaman, Farrokh Ayazi, Amir Rahafrooz, Wang-Kyung Sung, Ijaz Jafri
  • Patent number: 7830003
    Abstract: A device according to the present invention includes a MEMS device supported on a first side of a die. A first side of an isolator is attached to the first side of the die. A package is attached to the first side of the isolator, with at least one electrically conductive attachment device attaching the die to the isolator and attaching the isolator to the package. The isolator may include isolation structures and a receptacle.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: November 9, 2010
    Assignee: Honeywell International, Inc.
    Inventors: Michael Foster, Ijaz Jafri, Mark Eskridge, Shifang Zhou
  • Publication number: 20090166827
    Abstract: A device according to the present invention includes a MEMS device supported on a first side of a die. A first side of an isolator is attached to the first side of the die. A package is attached to the first side of the isolator, with at least one electrically conductive attachment device attaching the die to the isolator and attaching the isolator to the package. The isolator may include isolation structures and a receptacle.
    Type: Application
    Filed: December 27, 2007
    Publication date: July 2, 2009
    Applicant: Honeywell International, Inc.
    Inventors: Michael Foster, Ijaz Jafri, Mark Eskridge, Shifang Zhou
  • Publication number: 20060211169
    Abstract: A method for forming a vibrating micromechanical structure having a single crystal silicon (SCS) micromechanical resonator formed using a two-wafer process, including either a Silicon-on-insulator (SOI) or insulating base and resonator wafers, wherein resonator anchors, capacitive air gap, isolation trenches, and alignment marks are micromachined in an active layer of the base wafer; the active layer of the resonator wafer is bonded directly to the active layer of the base wafer; the handle and dielectric layers of the resonator wafer are removed; windows are opened in the active layer of the resonator wafer; masking the active layer of the resonator wafer with photoresist; a SCS resonator is machined in the active layer of the resonator wafer using silicon dry etch micromachining technology; and the photoresist is subsequently dry stripped. A patterned SCS cover is bonded to the resonator wafer resulting in hermetically sealed chip scale wafer level vacuum packaged devices.
    Type: Application
    Filed: December 30, 2005
    Publication date: September 21, 2006
    Applicant: Honeywell International, Inc.
    Inventors: Ijaz Jafri, Galen Magendanz
  • Publication number: 20060207087
    Abstract: A method for fabrication of single crystal silicon micromechanical resonators using a two-wafer process, including either a Silicon-on-insulator (SOI) or insulating base and resonator wafers, wherein resonator anchors, a capacitive air gap, isolation trenches, and alignment marks are micromachined in an active layer of the base wafer; the active layer of the resonator wafer is bonded directly to the active layer of the base wafer; the handle and dielectric layers of the resonator wafer are removed; viewing windows are opened in the active layer of the resonator wafer; masking the single crystal silicon semiconductor material active layer of the resonator wafer with photoresist material; a single crystal silicon resonator is machined in the active layer of the resonator wafer using silicon dry etch micromachining technology; and the photoresist material is subsequently dry stripped.
    Type: Application
    Filed: March 21, 2005
    Publication date: September 21, 2006
    Applicant: Honeywell International, Inc.
    Inventors: Ijaz Jafri, Jonathan Klein, Galen Magendanz
  • Publication number: 20060057959
    Abstract: The present invention provides systems and methods for pre-filter in a VHF receiver using Micro-Electro-Mechanical Systems (MEMS) filters. The system includes an antenna, and first and second Micro-Electro-Mechanical Systems (MEMS) filters. The first MEMS filter filters a signal received by the antenna based on a first pre-defined bandwidth, and the second MEMS filter filters the signal filtered by the first MEMS filter based on a second bandwidth. The system also includes an analog to digital converter that converts the signal filtered by the second MEMS filter into a digital signal, a down converter that down converts the digital signal produced by the A to D converter, and a digital signal processor that processes the down converted digital signal produced by the down converter. The first and second MEMS filters or the down converter are adjustable based on a received tuning signal.
    Type: Application
    Filed: September 10, 2004
    Publication date: March 16, 2006
    Inventors: David Vacanti, Ijaz Jafri, Keith Bayern
  • Patent number: 6602349
    Abstract: A dry process for the cleaning of precision surfaces such as of semiconductor wafers, by using process materials such as carbon dioxide and useful additives such as cosolvents and surfactants, where the process materials are applied exclusively in gaseous and supercritical states. Soak and agitation steps are applied to the wafer, including a rapid decompression of the process chamber after a soak period at higher supercritical pressure, to mechanically weaken break up the polymers and other materials sought to be removed, combined with a supercritical fluid flush to carry away the loose debris.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: August 5, 2003
    Assignee: S.C. Fluids, Inc.
    Inventors: Mohan Chandra, David J. Mount, Michael A. Costantini, Heiko D. Moritz, Ijaz Jafri, Jim Boyd, Rick M. Heathwaite
  • Patent number: 6365225
    Abstract: A method and apparatus, and product by process, for the production of bulk polysilicon by a chemical vapor deposition process on a removable tube section. A quartz envelope and base plate form a CVD reactor enclosure, with external radiant heaters providing process heat through the wall of the reactor, and with process gas inlet and outlet ports located in the base plate. A tube section, preferably an EFG silicon tube-section, vertically emplaced on the base plate and capped to close the top is used as the reaction chamber. During the CVD process, deposition occurs on the inside surface of the chamber tube, the inner diameter of the deposit layer becoming increasingly smaller as the yield accumulates. In a two tube reactor, a smaller diameter, vertical middle tube is uniformly spaced and supported inside the chamber tube for fall flow of process gas over and under the middle tube so that deposition occurs on the three exposed tube surfaces.
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: April 2, 2002
    Assignee: G.T. Equipment Technologies, Inc.
    Inventors: Mohan Chandra, Kedar P. Gupta, Jonathan A. Talbott, Ijaz Jafri, Vishwanath Prasad
  • Patent number: 6334266
    Abstract: A method and apparatus for fabricating and drying wafers, including micro-electro-mechanical system (MEMS) structures, in a second, supercritical processing fluid environment. The apparatus utilizes an inverted pressure vessel connected to a supercritical processing fluid supply and recover system, with an internal heat exchanger connected to external heating and cooling sources, which is closed with a vertically movable base plate. A wafer cassette configured for supporting multiple wafers is submerged in a first processing fluid within a container, which is installed on the base plate for insertion into the pressure vessel. Vessel inlet and outlet tubes extend vertically downward from the ceiling of the pressure vessel to nearly the base plate. Container inlet and outlet tubes extend vertically downward from the ceiling of the pressure vessel to inside the container and nearly to the bottom of the container.
    Type: Grant
    Filed: September 20, 2000
    Date of Patent: January 1, 2002
    Assignee: S.C. Fluids, Inc.
    Inventors: Heiko D Moritz, Jonathan A. Talbott, Mohan Chandra, James A. Tseronis, Ijaz Jafri