Abstract: A display apparatus includes a display panel, a driving controller and a data driver. The driving controller processes input image data according to a variable input frequency and generates a data signal having a varied frame length. The data driver converts the data signal into a data voltage and outputs the data voltage to the display panel. The driving controller determines a variable frequency mode and generates an asymmetric data signal including a positive data signal and a negative data signal which are asymmetric with respect to a common voltage for a same grayscale value in the variable frequency mode.

Abstract: A display device includes: a gray converter which adds compensation grays to input grays to provide output grays; a data driver which provides data voltages corresponding to the output grays; and a display panel which includes pixels which receives the data voltages, where the gray converter includes: a voltage domain converter which converts the input grays into conversion grays; and a compensation gray calculator which calculates the compensation grays based on the conversion grays.

Abstract: A display device includes: a gray converter which adds compensation grays to input grays to provide output grays; a data driver which provides data voltages corresponding to the output grays; and a display panel which includes pixels which receives the data voltages, where the gray converter includes: a voltage domain converter which converts the input grays into conversion grays; and a compensation gray calculator which calculates the compensation grays based on the conversion grays.

Abstract: A method of driving a display panel includes determining a present polarity of a pixel data signal of a present frame, generating a first compensated grayscale of the pixel data signal of the present frame using a pixel data signal of a previous frame, the pixel data signal of the present frame, and the present polarity, and displaying an image using the first compensated grayscale. The first compensated grayscale varies according to the present polarity.

Abstract: A display apparatus includes a display panel, a driving controller and a data driver. The driving controller processes input image data according to a variable input frequency and generates a data signal having a varied frame length. The data driver converts the data signal into a data voltage and outputs the data voltage to the display panel. The driving controller determines a variable frequency mode and generates an asymmetric data signal including a positive data signal and a negative data signal which are asymmetric with respect to a common voltage for a same grayscale value in the variable frequency mode.

Abstract: A display device and a driving method thereof are disclosed. In one aspect, the display device includes a display panel including a plurality of pixel rows, a data driver configured to transfer data voltages to the display panel, a gate driver configured to transfer gate signals to the display panel, and a signal controller configured to control the data driver and the gate driver. The pixel rows are divided into i (i is a natural number of 2 or more) pixel row groups including a plurality of pixel rows, respectively. The display panel displays one still image for one frame set including the i sequential frames, and each of the i pixel row groups is charged by receiving the data voltage for each frame of the frame set, and the frames in which the i pixel row groups are charged are different from each other.

Abstract: A timing controller includes a count control circuit, a pulse width detector, and a pulse generator. The count control circuit receives an external enable signal. Pulses of the external enable signal include an effective and a blank period of image data. The count control circuit counts pulse widths of each of the pulses. The pulse width detector receives the counted pulse widths, compares a pulse width of a present pulse with pulse widths of previous pulses, and detects a pulse width of a previous pulse that has a pulse width smaller than the pulse width of the present pulse. The pulse generator generates three output pulses having pulse widths that are one-third a period of the detected previous pulse. The pulse generator outputs the first, second and third pulses as an internal enable signal.

Abstract: A display device includes a display panel including unit areas. Each of the unit areas includes pixels arranged in a matrix formation; and data lines (DLs) connected to the pixels. The display device is configured to: apply data voltages of a same polarity to first DLs positioned between adjacent pixel columns; and apply DVs of different polarities to second DLs positioned at respective sides of each pixel column. Each of the pixels is connected to one of the second DLs. A connection direction between the pixels and the DLs in each of a plurality of pixel rows is changed in a determined pixel column interval. Connection directions between the pixels and the DLs are opposite each other in odd-numbered pixel rows adjacent in a column direction. Connection directions between the pixels and the DLs are opposite each other in even-numbered pixel rows adjacent in the column direction.

Abstract: A timing controller includes a count control circuit, a pulse width detector, and a pulse generator. The count control circuit receives an external enable signal. Pulses of the external enable signal include an effective and a blank period of image data. The count control circuit counts pulse widths of each of the pulses. The pulse width detector receives the counted pulse widths, compares a pulse width of a present pulse with pulse widths of previous pulses, and detects a pulse width of a previous pulse that has a pulse width smaller than the pulse width of the present pulse. The pulse generator generates three output pulses having pulse widths that are one-third a period of the detected previous pulse. The pulse generator outputs the first, second and third pulses as an internal enable signal.

Abstract: A method of driving a display panel includes determining a present polarity of a pixel data signal of a present frame, generating a first compensated grayscale of the pixel data signal of the present frame using a pixel data signal of a previous frame, the pixel data signal of the present frame, and the present polarity, and displaying an image using the first compensated grayscale. The first compensated grayscale varies according to the present polarity.

Abstract: A display device and a driving method thereof are disclosed. In one aspect, the display device includes a display panel including a plurality of pixel rows, a data driver configured to transfer data voltages to the display panel, a gate driver configured to transfer gate signals to the display panel, and a signal controller configured to control the data driver and the gate driver. The pixel rows are divided into i (i is a natural number of 2 or more) pixel row groups including a plurality of pixel rows, respectively. The display panel displays one still image for one frame set including the i sequential frames, and each of the i pixel row groups is charged by receiving the data voltage for each frame of the frame set, and the frames in which the i pixel row groups are charged are different from each other.

Abstract: A method of driving a display panel includes determining a present polarity of a pixel data signal of a present frame, generating a first compensated grayscale of the pixel data signal of the present frame using a pixel data signal of a previous frame, the pixel data signal of the present frame, and the present polarity, and displaying an image using the first compensated grayscale. The first compensated grayscale varies according to the present polarity.

Abstract: A display device and a driving method thereof are disclosed. In one aspect, the display device includes a display panel including a plurality of pixel rows, a data driver configured to transfer data voltages to the display panel, a gate driver configured to transfer gate signals to the display panel, and a signal controller configured to control the data driver and the gate driver. The pixel rows are divided into i (i is a natural number of 2 or more) pixel row groups including a plurality of pixel rows, respectively. The display panel displays one still image for one frame set including the i sequential frames, and each of the i pixel row groups is charged by receiving the data voltage for each frame of the frame set, and the frames in which the i pixel row groups are charged are different from each other.

Abstract: A display device includes a display unit including a plurality of pixels, a plurality of gate lines and a plurality of data lines which are connected to the plurality of pixels, a data driver applying data voltages to the plurality of data lines, and a gate driver delaying and outputting first gate signals applied to gate lines among the plurality of gate lines in a first sub-frame included in one frame and advancing and outputting second gate signals which are applied to remaining gate lines among the plurality of gate lines in a second sub-frame.

Abstract: A display device and a driving method thereof are disclosed. In one aspect, the display device includes a display panel including a plurality of pixel rows, a data driver configured to transfer data voltages to the display panel, a gate driver configured to transfer gate signals to the display panel, and a signal controller configured to control the data driver and the gate driver. The pixel rows are divided into i (i is a natural number of 2 or more) pixel row groups including a plurality of pixel rows, respectively. The display panel displays one still image for one frame set including the i sequential frames, and each of the i pixel row groups is charged by receiving the data voltage for each frame of the frame set, and the frames in which the i pixel row groups are charged are different from each other.

Abstract: A display device and a driving method thereof are disclosed. In one aspect, the display device includes a display panel including a plurality of pixel rows, a data driver configured to transfer data voltages to the display panel, a gate driver configured to transfer gate signals to the display panel, and a signal controller configured to control the data driver and the gate driver. The pixel rows are divided into i (i is a natural number of 2 or more) pixel row groups including a plurality of pixel rows, respectively. The display panel displays one still image for one frame set including the i sequential frames, and each of the i pixel row groups is charged by receiving the data voltage for each frame of the frame set, and the frames in which the i pixel row groups are charged are different from each other.

Abstract: An adaptive black clipping circuit in a display device includes a data corrector, a register, a pattern detector and a clipping selector. The data corrects input image data to generate corrected image data such that the corrected image data is equal to or greater than a black clipping value where the black clipping value corresponds to the input image data having a grayscale value of zero and the black clipping value is greater than zero. The register stores and provides configuration data. The pattern detector generates a pattern detection signal based on the input image data corresponding to a plurality of rows. The clipping selector selects one of the corrected image data and the configuration data in response to the pattern detection signal to provide output image data.

Abstract: A timing controller includes a count control circuit, a pulse width detector, and a pulse generator. The count control circuit receives an external enable signal. Pulses of the external enable signal include an effective and a blank period of image data. The count control circuit counts pulse widths of each of the pulses. The pulse width detector receives the counted pulse widths, compares a pulse width of a present pulse with pulse widths of previous pulses, and detects a pulse width of a previous pulse that has a pulse width smaller than the pulse width of the present pulse. The pulse generator generates three output pulses having pulse widths that are one-third a period of the detected previous pulse. The pulse generator outputs the first, second and third pulses as an internal enable signal.

Abstract: A display apparatus includes a display panel comprising a plurality of data lines, a plurality of gate lines crossing the plurality of data lines and a plurality of pixels connected to the plurality of data lines and the plurality of gate lines, each of the plurality of pixels comprising a plurality of color sub-pixels, and a data driver configured to output data voltages of a positive polarity and a negative polarity opposite to the positive polarity with respect to the reference voltage to the plurality of data lines, wherein a polarity stuck period of at least one color sub-pixel of the plurality of color sub-pixels is different from a polarity stuck period of other color sub-pixel of the plurality of color sub-pixels, and the polarity stuck period is a pixel distance in which a same polarity moves per a frame.

Abstract: The disclosed display device of improved display quality and reduced power consumption includes a display unit including pixels coupled to gate lines and data lines, a gate driving unit for outputting a gate signal to the gate lines, a data driving unit for outputting a data signal to the data lines, a voltage supply unit for supplying to the gate driving unit a gate-on voltage to generate the gate signal a gate-off voltage, and a kickback compensation voltage having a voltage level varied at a section of time of the gate-on voltage, and a display mode control unit for controlling the voltage supply unit to supply the kickback compensation voltage during a first display mode for displaying an image on an entire area of the display unit, and to block supply of the kickback compensation voltage during a second display mode for displaying an image on only a partial area.