Abstract: The manufacturing method of a palladium transition metal core-based core-shell electrode catalyst according to an exemplary embodiment of the present disclosure includes a first step of preparing a slurry by irradiating ultrasonic wave to a dispersion solution including a solvent, a platinum precursor, a palladium precursor, a carbon support, and a transition metal precursor, a second step of preparing a solid material by filtering, washing, and drying the slurry prepared in the first step, and a third step of preparing a core-shell electrode catalyst by thermally treating the solid prepared in the second step in a specific gas atmosphere.

Abstract: Disclosed is a breeding nuclear fuel mixture including metallic thorium useable in a nuclear power plant, prepared by mixing uranium dioxide (UO2) or plutonium dioxide (PuO2) having ceramic properties with metallic thorium (Th), in order to enable thorium breeding by neutrons released during nuclear fission of U or Pu and conversion of the bred thorium into a novel nuclear fissile material, i.e., U-233, thereby ensuring continuous nuclear fission. The foregoing nuclear fuel mixture may be burned at a reactor core of a nuclear power plant through thorium breeding over a long period of time. Therefore, when the inventive breeding nuclear fuel mixture is employed in a nuclear power plant, utilization of the nuclear power plant may be increased while maximizing conservation of limited uranium resources.

Abstract: A method of manufacturing a heterojunction BiCMOS IC. (100) includes forming a gate electrode (121, 131), forming a protective layer (901, 902) over the gate electrode, forming a semiconductor layer (1101) over the protective layer, depositing an electrically insulative layer (1102, 1103) over the semiconductor layer, using a mask layer (1104) to define a doped region (225) in the semiconductor layer and to define a hole (1201) in the electrically insulative layer, forming an electrically conductive layer (1301) over the electrically insulative layer, using another mask layer (1302) to define an emitter region (240) in the electrically conductive layer and to define an intrinsic base region (231) and a portion of an extrinsic base region (232) in the electrically conductive layer, and using yet another mask layer (1502) to define another portion of the extrinsic base region in the electrically conductive layer.

Abstract: A semiconductor structure (10) having device isolation structures (43, 44) and shielding structures (39, 40). The shielding structures (39, 40) are formed in a semiconductor material (11) and the device isolation structures (43, 44) are formed within the corresponding shielding structures (39, 40). A noise generating device is formed within a first shielding structure (43) and a noise sensitive device is formed within a second shielding structure (44). The two shielding structures (39, 40) are grounded and prevent noise from the noise generating device from interfering with the noise sensitive device.