Patents by Inventor Ik-sung OH

Ik-sung OH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190310774
    Abstract: A memory system may include: a memory device including a plurality of memory blocks; and a controller suitable for grouping the memory blocks based on type into a plurality of super blocks according to a preset condition and managing the memory blocks by managing the super blocks, the controller may manage one or more of the super blocks, in each of which at least one bad memory block and good memory blocks are grouped, by classifying the one or more superblocks as first super blocks, and the controller may differently manage uses of the respective first super blocks based on the numbers of bad memory blocks included in the respective first super blocks.
    Type: Application
    Filed: November 9, 2018
    Publication date: October 10, 2019
    Inventors: Ik-Sung OH, Kyeong-Rho KIM, Sung-Kwan HONG, Jin-Woong KIM
  • Patent number: 10402102
    Abstract: A memory system includes: a memory device including a plurality of memory blocks for storing data; a controller memory including a read data area for storing first data, which is read from a victim memory block among the plurality of memory blocks, and a write data area for storing second data, which is to be written into a target memory block among the plurality of memory blocks; and a controller suitable for reading the first data from the read data area, storing the first data into a host memory, and, when the first data stored in the host memory satisfies a predetermined condition, reading the first data from the host memory and storing the first data into the write data area.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: September 3, 2019
    Assignee: SK hynix Inc.
    Inventors: Ik-Sung Oh, Jin-Woong Kim
  • Patent number: 10366776
    Abstract: A memory system may include: a memory device including a plurality of memory blocks configured in a plurality of super memory blocks; and a controller suitable for detecting two or more bad super memory blocks each including at least one bad block among the super memory blocks, selecting at least one victim super memory block among the bad super memory blocks, and replacing the at least one bad block in each remaining bad super memory block with at least one normal block of the victim super memory block.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: July 30, 2019
    Assignee: SK hynix Inc.
    Inventors: Ik-Sung Oh, Byeong-Gyu Park, Kyu-Min Lee
  • Publication number: 20190227736
    Abstract: There are provided a memory interface, a command queue controller configured to determine an execution order of normal commands and a suspend command; a command time controller configured to receive the normal commands, and output command and time information by providing a corresponding additional operation time to each of the normal commands; a command time manager configured to match the command and time information to each of the normal commands to be stored therein, and output an end signal; and an input/output interface configured to receive the normal commands and the suspend command, and transmit the normal commands and the suspend command to a memory device through a channel.
    Type: Application
    Filed: August 31, 2018
    Publication date: July 25, 2019
    Inventors: Sung Kwan HONG, Ik Sung OH
  • Publication number: 20190227745
    Abstract: Provided herein may be a memory controller and a method of operating the memory controller. The memory controller may include: a host interface layer configured to receive a request for a memory device from a host; a flash translation layer configured to generate a descriptor including a flag indicating whether the request is a priority read request; and a flash interface layer configured to suspend requests input prior to the priority read request depending on the flag, store the requests input prior to the priority read request, and perform the priority read request.
    Type: Application
    Filed: August 28, 2018
    Publication date: July 25, 2019
    Inventors: Sung Kwan HONG, Ik Sung OH, Ji Hoon YIM
  • Publication number: 20190163602
    Abstract: A memory system includes a nonvolatile memory device; a random access memory configured to store, in response to an unmap request received from a host device, a flag information indicating that an unmap address as a target of the unmap request is unmapped; and a control unit configured to flush the flag information to the nonvolatile memory device, wherein the control unit flushes the flag information to the nonvolatile memory device when a first condition is satisfied.
    Type: Application
    Filed: July 13, 2018
    Publication date: May 30, 2019
    Inventors: Byeong Gyu PARK, Ik Sung OH, Seung Gu JI, Sung Kwan HONG
  • Patent number: 10275349
    Abstract: A method for operating a data storage device includes determining a valid page distribution characteristic of used memory blocks; and performing a garbage collection operation based on the valid page distribution characteristic of used memory blocks.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: April 30, 2019
    Assignee: SK hynix Inc.
    Inventors: Jin Woong Kim, Ik Sung Oh, Seung Wan Jung
  • Patent number: 10203908
    Abstract: A controller may include a first map buffer and a second map buffer suitable for storing map data and hit counts respectively corresponding to the map data, wherein each of the hit counts represents a number of accesses to data stored in a memory device by using a corresponding one among the map data, and wherein the controller swaps the map data and corresponding hit counts between the first and second map buffers such that the first map buffer stores relatively higher hit counts and corresponding map data than the second map buffer.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: February 12, 2019
    Assignee: SK Hynix Inc.
    Inventor: Ik-Sung Oh
  • Publication number: 20180307597
    Abstract: A memory system may include: a memory device including a plurality of memory dies suitable for storing data; and a controller operatively coupled to the memory dies of the memory device via a plurality of channels, the controller may be suitable for checking the plurality of the channels, selecting independently best transmission channels and best reception channels among the plurality of the channels according to states of the channels, requesting performing of command operations corresponding to the commands through the best transmission channels to the memory dies, and receiving performance results of the command operations through the best reception channels from the memory dies.
    Type: Application
    Filed: January 5, 2018
    Publication date: October 25, 2018
    Inventors: Ik-Sung OH, Jin-Woong KIM
  • Publication number: 20180285256
    Abstract: A memory system includes: a memory device including a plurality of memory blocks for storing data; a controller memory including a read data area for storing first data, which is read from a victim memory block among the plurality of memory blocks, and a write data area for storing second data, which is to be written into a target memory block among the plurality of memory blocks; and a controller suitable for reading the first data from the read data area, storing the first data into a host memory, and, when the first data stored in the host memory satisfies a predetermined condition, reading the first data from the host memory and storing the first data into the write data area.
    Type: Application
    Filed: November 3, 2017
    Publication date: October 4, 2018
    Inventors: Ik-Sung OH, Jin-Woong KIM
  • Publication number: 20180151251
    Abstract: A memory system may include: a memory device including a plurality of memory blocks configured in a plurality of super memory blocks; and a controller suitable for detecting two or more bad super memory blocks each including at least one bad block among the super memory blocks, selecting at least one victim super memory block among the bad super memory blocks, and replacing the at least one bad block in each remaining bad super memory block with at least one normal block of the victim super memory block.
    Type: Application
    Filed: September 5, 2017
    Publication date: May 31, 2018
    Inventors: Ik-Sung OH, Byeong-Gyu PARK, Kyu-Min LEE
  • Publication number: 20180067692
    Abstract: A controller may include a first map buffer and a second map buffer suitable for storing map data and hit counts respectively corresponding to the map data, wherein each of the hit counts represents a number of accesses to data stored in a memory device by using a corresponding one among the map data, and wherein the controller swaps the map data and corresponding hit counts between the first and second map buffers such that the first map buffer stores relatively higher hit counts and corresponding map data than the second map buffer.
    Type: Application
    Filed: April 27, 2017
    Publication date: March 8, 2018
    Inventor: Ik-Sung OH
  • Publication number: 20170255550
    Abstract: A method for operating a data storage device includes determining a valid page distribution characteristic of used memory blocks; and performing a garbage collection operation based on the valid page distribution characteristic of used memory blocks.
    Type: Application
    Filed: July 6, 2016
    Publication date: September 7, 2017
    Inventors: Jin Woong KIM, Ik Sung OH, Seung Wan JUNG
  • Publication number: 20120092370
    Abstract: An apparatus to provide AR includes a marker recognition unit to recognize objects in reality information, an amalgamation determining unit to determine whether the objects are amalgamated, an amalgamation processing unit to determine an attribute of each of the recognized objects and to generate an amalgamated object based on the determined attributes, and an object processing unit to map the amalgamated object to the reality information and to display the mapped amalgamated object. A method for amalgamating objects in AR includes recognizing objects in reality information, determining whether the objects are amalgamated, determining an attribute of each of the recognized objects, generating an amalgamated object based on the determined attribute, mapping the amalgamated object to the reality information, and displaying the mapped amalgamated object.
    Type: Application
    Filed: August 2, 2011
    Publication date: April 19, 2012
    Applicant: PANTECH CO., LTD.
    Inventors: Ik Sung OH, Dae Heum KIM, Seong Il KIM, Chan Joo PARK, Jong Hyuk EUN, Eun Mi RHEE, Kyeong Min CHOI, Ki Soo CHOI
  • Publication number: 20110107210
    Abstract: A user interface apparatus using three-dimensional axes and a user interface apparatus using two-dimensional planes, each of the two-dimensional planes being formed by two of three-dimensional axes, are provided. The user interface apparatus uses the three-dimensional axes or the two-dimensional planes to select a menu or to search for desired information in a device, such as a mobile terminal.
    Type: Application
    Filed: August 31, 2010
    Publication date: May 5, 2011
    Applicant: PANTECH CO., LTD.
    Inventors: Chan-joo PARK, Kyung-sun WON, Eun-mi LEE, Dae-heum KIM, Kyeong-min CHOI, Ik-sung OH