Patents by Inventor IKKYUN PARK

IKKYUN PARK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230084601
    Abstract: An operating method of a memory system including a memory device including a plurality of memory chips is provided. The operating method includes setting a parameter indicating a number of the memory chips allowed to operate in parallel for each of a plurality of operation statuses, based on information about power consumption of each of the plurality of operation statuses of a memory chip among the memory chips; obtaining information about an operation status of each of the plurality of memory chips; and scheduling data access across a plurality of channels respectively corresponding to the plurality of memory chips, based on the parameter and the information about the operation status of each of the plurality of memory chips.
    Type: Application
    Filed: October 27, 2022
    Publication date: March 16, 2023
    Inventors: IKKYUN PARK, SOONGMANN SHIN, GYUSEOK CHOE
  • Patent number: 11531630
    Abstract: An operating method of a memory system including a memory device including a plurality of memory chips is provided. The operating method includes setting a parameter indicating a number of the memory chips allowed to operate in parallel for each of a plurality of operation statuses, based on information about power consumption of each of the plurality of operation statuses of a memory chip among the memory chips; obtaining information about an operation status of each of the plurality of memory chips; and scheduling data access across a plurality of channels respectively corresponding to the plurality of memory chips, based on the parameter and the information about the operation status of each of the plurality of memory chips.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: December 20, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ikkyun Park, Soongmann Shin, Gyuseok Choe
  • Publication number: 20210149828
    Abstract: An operating method of a memory system including a memory device including a plurality of memory chips is provided. The operating method includes setting a parameter indicating a number of the memory chips allowed to operate in parallel for each of a plurality of operation statuses, based on information about power consumption of each of the plurality of operation statuses of a memory chip among the memory chips; obtaining information about an operation status of each of the plurality of memory chips; and scheduling data access across a plurality of channels respectively corresponding to the plurality of memory chips, based on the parameter and the information about the operation status of each of the plurality of memory chips.
    Type: Application
    Filed: October 23, 2020
    Publication date: May 20, 2021
    Inventors: IKKYUN PARK, SOONGMANN SHIN, GYUSEOK CHOE