Patents by Inventor Iku Shiota

Iku Shiota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6479410
    Abstract: A wafer is mounted on a mounting stand 3 that is provided with an electrostatic chuck. Then an SiOF film is formed by creating a plasma of a processing gas and heating the wafer W to approximately 350° C. while the surface of the mounting stand 3 is heated to 200° C. After ten wafers W have been processed, cleaning is performed to remove a film S that has adhered to the interior of the film-formation chamber, and then a pre-coat is formed. A protective plate 5 made of aluminum nitride is placed on the mounting stand 3 during the cleaning and pre-coating steps. The protective plate 5 protects the surface of the electrostatic chuck during the cleaning and prevents the formation of a film on the mounting stand 3 during the pre-coating. In addition, since the protective plate 5 is electrostatically attracted to the mounting stand 3 and it is also strong with respect to thermal shocks, there is no need to lower the temperature of the mounting stand 3 during the cleaning, which improves throughput.
    Type: Grant
    Filed: April 7, 1998
    Date of Patent: November 12, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Iku Shiota, Shoichi Abe
  • Patent number: 6472711
    Abstract: In order to provide a semiconductor substrate that can be an SOI substrate suitable for production of high-frequency transistor, the semiconductor substrate is produced by a method of producing the semiconductor substrate having a step of bonding a first base having a semiconductor layer region to a second base and a step of removing the first base while leaving the semiconductor layer region on the second base, wherein a magnitude relation between the concentration of a p-type impurity and the concentration of an n-type impurity in the bonding atmosphere is established according to the composition of the second base.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: October 29, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventor: Iku Shiota
  • Publication number: 20020006724
    Abstract: A wafer is mounted on a mounting stand 3 that is provided with an electrostatic chuck, then an SiOF film is formed by creating a plasma of a processing gas and heating the wafer W to approximately 350° C. while the surface of the mounting stand 3 is heated to 200° C. After ten wafers W have been processed, cleaning is performed to remove a film S that has adhered to the interior of the film-formation chamber, and then a pre-coat is formed. A protective plate 5 made of aluminum nitride is placed on the mounting stand 3 during the cleaning and pre-coating steps. The protective plate 5 protects the surface of the electrostatic chuck during the cleaning and prevents the formation of a film on the mounting stand 3 during the pre-coating. In addition, since the protective plate 5 is electrostatically attracted to the mounting stand 3 and it is also strong with respect to thermal shocks, there is no need to lower the temperature of the mounting stand 3 during the cleaning, which improves throughput.
    Type: Application
    Filed: April 7, 1998
    Publication date: January 17, 2002
    Inventors: IKU SHIOTA, SHOICHI ABE
  • Patent number: 6171932
    Abstract: In order to provide a semiconductor substrate that can be an SOI substrate suitable for production of high-frequency transistor, the semiconductor substrate is produced by a method of producing the semiconductor substrate having a step of bonding a first base having a semiconductor layer region to a second base and a step of removing the first base while leaving the semiconductor layer region on the second base, wherein a magnitude relation between the concentration of a p-type impurity and the concentration of an n-type impurity in the bonding atmosphere is established according to the composition of the second base.
    Type: Grant
    Filed: July 21, 1999
    Date of Patent: January 9, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventor: Iku Shiota
  • Patent number: 5956837
    Abstract: After the release of the application of an attraction voltage to an electrostatic chuck that is attracting a semiconductor wafer, the wafer is pushed upward by lifting pins through only a very small projection distance. Immediately after processing has ended, the temperature of the wafer is several tens of degrees higher than that of the electrostatic chuck so that, if the wafer has detached, the temperature of the rear surface thereof will fall toward the original temperature of the electrostatic chuck. If the wafer has not detached, the temperature thereof will not fall. Therefore, a determination is made as to whether the wafer has detached or whether it is being subjected to residual attraction, based on temperature change data obtained for the wafer in combination with the electrostatic chuck, by a temperature sensor after the wafer has been pushed upward by a very small projection distance. If there is residual attraction, wafer transfer is halted.
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: September 28, 1999
    Assignee: Tokyo Electron Limited
    Inventors: Iku Shiota, Kyo Tsuboi