Patents by Inventor Ikuo Fukami

Ikuo Fukami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9912329
    Abstract: A semiconductor device includes a high side driver, in which the high side driver has an output transistor configured to supply a power voltage to an output terminal based on a driving voltage applied to a gate electrode of the output transistor; a short circuit transistor configured to couple the gate electrode of the output transistor with the output terminal; and a switch transistor connected in series between the gate electrode of the output transistor and a drain electrode of the short circuit transistor. The switch transistor is controlled by a back gate of the switch transistor.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: March 6, 2018
    Assignee: Renesas Electronics Corporation
    Inventor: Ikuo Fukami
  • Publication number: 20170111038
    Abstract: A semiconductor device includes a high side driver, in which the high side driver has an output transistor configured to supply a power voltage to an output terminal based on a driving voltage applied to a gate electrode of the output transistor; a short circuit transistor configured to couple the gate electrode of the output transistor with the output terminal; and a switch transistor connected in series between the gate electrode of the output transistor and a drain electrode of the short circuit transistor. The switch transistor is controlled by a back gate of the switch transistor.
    Type: Application
    Filed: December 23, 2016
    Publication date: April 20, 2017
    Applicant: Renesas Electronics Corporation
    Inventor: Ikuo FUKAMI
  • Patent number: 9564844
    Abstract: An output MOS transistor has a drain connected with a power supply and a source connected with an output terminal. The short-circuit MOS transistor has a source connected with the output terminal. The short-circuit MOS transistor is formed in a semiconductor substrate connected with the power supply. A switching device is formed in a semiconductor region which is formed in the semiconductor substrate, and contains a first diffusion layer connected with the gate of the output MOS transistor and a second diffusion layer formed in the semiconductor region and connected with the drain of the short-circuit MOS transistor.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: February 7, 2017
    Assignee: Renesas Electronics Corporation
    Inventor: Ikuo Fukami
  • Publication number: 20150333674
    Abstract: An output MOS transistor has a drain connected with a power supply and a source connected with an output terminal. The short-circuit MOS transistor has a source connected with the output terminal. The short-circuit MOS transistor is formed in a semiconductor substrate connected with the power supply. A switching device is formed in a semiconductor region which is formed in the semiconductor substrate, and contains a first diffusion layer connected with the gate of the output MOS transistor and a second diffusion layer formed in the semiconductor region and connected with the drain of the short-circuit MOS transistor.
    Type: Application
    Filed: July 23, 2015
    Publication date: November 19, 2015
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Ikuo FUKAMI
  • Patent number: 9124272
    Abstract: An output MOS transistor has a drain connected with a power supply and a source connected with an output terminal. The short-circuit MOS transistor has a source connected with the output terminal. The short-circuit MOS transistor is formed in a semiconductor substrate connected with the power supply. A switching device is formed in a semiconductor region which is formed in the semiconductor substrate, and contains a first diffusion layer connected with the gate of the output MOS transistor and a second diffusion layer formed in the semiconductor region and connected with the drain of the short-circuit MOS transistor.
    Type: Grant
    Filed: July 9, 2014
    Date of Patent: September 1, 2015
    Assignee: Renesas Electronics Corporation
    Inventor: Ikuo Fukami
  • Publication number: 20150022248
    Abstract: An output MOS transistor has a drain connected with a power supply and a source connected with an output terminal. The short-circuit MOS transistor has a source connected with the output terminal. The short-circuit MOS transistor is formed in a semiconductor substrate connected with the power supply. A switching device is formed in a semiconductor region which is formed in the semiconductor substrate, and contains a first diffusion layer connected with the gate of the output MOS transistor and a second diffusion layer formed in the semiconductor region and connected with the drain of the short-circuit MOS transistor.
    Type: Application
    Filed: July 9, 2014
    Publication date: January 22, 2015
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Ikuo FUKAMI
  • Patent number: 8780517
    Abstract: Provided is a semiconductor apparatus which includes a power transistor that is placed between an input terminal and an output terminal, a temperature detection diode that has a cathode connected to the input terminal and an anode connected to the output terminal, a current amplifier that outputs a detection current generated by amplifying a backward leakage current flowing from the cathode to the anode of the temperature detection diode, a first conversion resistor that outputs an overheat detection signal generated by converting the detection current into a voltage, a gating circuit that performs gating of a control signal according to the overheat detection signal, and a driver circuit that outputs a drive signal to a control terminal of the power transistor based on an output signal of the gating circuit.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: July 15, 2014
    Assignee: Renesas Electronics Corporation
    Inventor: Ikuo Fukami
  • Patent number: 8717058
    Abstract: A semiconductor apparatus (IPD) includes a set value storage unit that stores a set value determined based on an initial characteristic value of the IPD, and a detector that detects characteristic degradation of the IPD based on a characteristic value of the IPD at given timing and the set value stored in the set value storage unit. Further, a method of detecting characteristic degradation of a semiconductor apparatus (IPD) includes storing a set value determined based on an initial characteristic value of the IPD, and detecting characteristic degradation of the IPD based on a characteristic value of the IPD at given timing and the stored set value.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: May 6, 2014
    Assignee: Renesas Electronics Corporation
    Inventor: Ikuo Fukami
  • Patent number: 8531170
    Abstract: A semiconductor device of the present invention includes an output transistor connected between a power supply terminal and an output terminal; a detection transistor generating a detection current that is proportional to a current flowing through the output transistor; a detection voltage generation unit generating a detection voltage based on a detection current; a protection transistor drawing a current from a control terminal of the output transistor to the output terminal according to the detection voltage; and a limited current generation circuit that generates a limited current that is obtained by converting a limit setting current that sets a current flowing through the output transistor in a protection state according to a variation of a threshold voltage of the protection transistor and a variation of the detection voltage with respect to the detection current, and supplies the limited current to a first terminal of the protection transistor.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: September 10, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Ikuo Fukami, Masaji Nakano
  • Patent number: 8405451
    Abstract: A current source circuit includes a reference current source circuit; a reference voltage source circuit generating a voltage proportional to a thermal voltage based on the reference current; a first transistor connected between the reference voltage source circuit and the second power supply voltage and through which a first current flows; a second transistor which has a gate applied with a voltage as a result of addition of the voltage generated by the reference voltage source circuit and a voltage between a source and a drain of the first transistor and through which a second current flows; a current source supplying a third current of a current value proportional to that of the first current; and a third transistor through which a difference current between the second current and the third current flows. An output current is supplied based on the difference current.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: March 26, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Ikuo Fukami
  • Patent number: 8243407
    Abstract: A semiconductor switch control device includes a current detecting unit that detects a current that flows in a semiconductor switch, a voltage detecting unit that detects a voltage, and a temperature detecting unit that detects a temperature. A transient thermal resistance value providing unit provides a transient thermal resistance value Zth in accordance with an elapsed time from reception of an excess voltage signal to a computing unit. A temperature detecting unit detects an initial temperature TJ0 when an excess voltage is produced. The computing unit calculates a temperature of the semiconductor switch by a following expression when a detected current value is represented by Ids, and a detected voltage value is represented by Vds: (expression): temperature of the semiconductor switch TJ=Ids×Vds×Zth+TJ0.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: August 14, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Ikuo Fukami
  • Publication number: 20110215859
    Abstract: A current source circuit includes a reference current source circuit; a reference voltage source circuit generating a voltage proportional to a thermal voltage based on the reference current; a first transistor connected between the reference voltage source circuit and the second power supply voltage and through which a first current flows; a second transistor which has a gate applied with a voltage as a result of addition of the voltage generated by the reference voltage source circuit and a voltage between a source and a drain of the first transistor and through which a second current flows; a current source supplying a third current of a current value proportional to that of the first current; and a third transistor through which a difference current between the second current and the third current flows. An output current is supplied based on the difference current.
    Type: Application
    Filed: March 4, 2011
    Publication date: September 8, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Ikuo FUKAMI
  • Publication number: 20110215783
    Abstract: A semiconductor device of the present invention includes an output transistor connected between a power supply terminal and an output terminal; a detection transistor generating a detection current that is proportional to a current flowing through the output transistor; a detection voltage generation unit generating a detection voltage based on a detection current; a protection transistor drawing a current from a control terminal of the output transistor to the output terminal according to the detection voltage; and a limited current generation circuit that generates a limited current that is obtained by converting a limit setting current that sets a current flowing through the output transistor in a protection state according to a variation of a threshold voltage of the protection transistor and a variation of the detection voltage with respect to the detection current, and supplies the limited current to a first terminal of the protection transistor.
    Type: Application
    Filed: March 1, 2011
    Publication date: September 8, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Ikuo FUKAMI, Masaji NAKANO
  • Publication number: 20110068818
    Abstract: A semiconductor apparatus (IPD) includes a set value storage unit that stores a set value determined based on an initial characteristic value of the IPD, and a detector that detects characteristic degradation of the IPD based on a characteristic value of the IPD at given timing and the set value stored in the set value storage unit. Further, a method of detecting characteristic degradation of a semiconductor apparatus (IPD) includes storing a set value determined based on an initial characteristic value of the IPD, and detecting characteristic degradation of the IPD based on a characteristic value of the IPD at given timing and the stored set value.
    Type: Application
    Filed: September 20, 2010
    Publication date: March 24, 2011
    Inventor: Ikuo FUKAMI
  • Publication number: 20100321846
    Abstract: Provided is a semiconductor apparatus which includes a power transistor that is placed between an input terminal and an output terminal, a temperature detection diode that has a cathode connected to the input terminal and an anode connected to the output terminal, a current amplifier that outputs a detection current generated by amplifying a backward leakage current flowing from the cathode to the anode of the temperature detection diode, a first conversion resistor that outputs an overheat detection signal generated by converting the detection current into a voltage, a gating circuit that performs gating of a control signal according to the overheat detection signal, and a driver circuit that outputs a drive signal to a control terminal of the power transistor based on an output signal of the gating circuit.
    Type: Application
    Filed: May 3, 2010
    Publication date: December 23, 2010
    Inventor: Ikuo FUKAMI
  • Patent number: 7724070
    Abstract: A charge charge-pump circuit according to an embodiment of the invention includes: a first boosting capacitor; a second boosting capacitor series-connected with the first boosting capacitor; a first boosting clock driver connected between the first boosting capacitor and the second boosting capacitor and boosting the first boosting capacitor; and a second boosting clock driver connected with the second boosting capacitor and boosting the first boosting capacitor and the second boosting capacitor after the first boosting clock driver boosts the first boosting capacitor.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: May 25, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Ikuo Fukami
  • Patent number: 7692479
    Abstract: In a semiconductor integrated circuit device including a charge pump circuit flowing an operating current therethrough, a current circuit is adapted to receive the operating current and a substantially constant current and generate an inverse current relative to the operating current and the substantially constant current.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: April 6, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Ikuo Fukami
  • Publication number: 20100046123
    Abstract: A semiconductor switch control device includes a current detecting unit that detects a current that flows in a semiconductor switch, a voltage detecting unit that detects a voltage, and a temperature detecting unit that detects a temperature. A transient thermal resistance value providing unit provides a transient thermal resistance value Zth in accordance with an elapsed time from reception of an excess voltage signal to a computing unit. A temperature detecting unit detects an initial temperature TJ0 when an excess voltage is produced. The computing unit calculates a temperature of the semiconductor switch by a following expression when a detected current value is represented by Ids, and a detected voltage value is represented by Vds: (expression): temperature of the semiconductor switch TJ=Ids×Vds×Zth+TJ0.
    Type: Application
    Filed: July 13, 2009
    Publication date: February 25, 2010
    Inventor: Ikuo Fukami
  • Patent number: 7554777
    Abstract: In a power supply control apparatus for controlling supplying of power from a battery to a load, a power supply switch circuit chip is connected to the load, to turn ON and OFF a connection between the battery and the load. A control circuit chip is powered by the battery to control the power supply switch circuit chip. The control circuit chip is constructed by an internal circuit for controlling the power supply switch circuit chip, a parasitic diode connected in parallel to the internal circuit, and a depletion type MOS transistor connected in series to the internal circuit. Diode characteristics of the parasitic diode and the depletion type MOS transistor are opposite to each other with respect to the battery. That is, in a forward-connected battery state, the parasitic diode and the depletion type MOS transistor are reverse-biased and forward-biased, respectively.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: June 30, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Ikuo Fukami
  • Publication number: 20080169863
    Abstract: In a semiconductor integrated circuit device including a charge pump circuit flowing an operating current therethrough, a current circuit is adapted to receive the operating current and a substantially constant current and generate an inverse relative to the operating current and the substantially constant current.
    Type: Application
    Filed: October 29, 2007
    Publication date: July 17, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Ikuo FUKAMI