Patents by Inventor Ikuo Imanishi

Ikuo Imanishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6870241
    Abstract: A high frequency switch circuit device includes an FET to be a switching element on a semiconductor substrate. The FET includes an n-type well, a gate electrode, a source layer and a drain layer. An n-type well line to be connected to an n-type well layer to be a back gate is connected to a voltage supply node via an inductor. The flow of a high frequency signal between the voltage supply node and the n-type well layer is blocked by the inductor, and the flow of a high frequency signal in the vertical direction is blocked by a depletion layer extending between the n-type well and a p-type substrate region. Moreover, the flow of a high frequency signal in the horizontal direction is blocked by a trench separation insulative layer.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: March 22, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshifumi Nakatani, Junji Ito, Ikuo Imanishi
  • Patent number: 6859085
    Abstract: A mixer circuit is composed of a differential amplifier circuit and a DBM circuit. The differential amplifier circuit has a first bipolar transistor, a second bipolar transistor, a first resistor provided between the respective bases of the first and second bipolar transistors, and a capacitor provided between the base of the second bipolar transistor and the ground. Since the first resistor and the capacitor are provided such that the circuit undergoes RC oscillation in response to the third harmonic of an input signal, the third and higher-order harmonics can be reduced.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: February 22, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daisuke Watanabe, Junji Itoh, Ikuo Imanishi
  • Publication number: 20040061544
    Abstract: A mixer circuit is composed of a differential amplifier circuit and a DBM circuit. The differential amplifier circuit has a first bipolar transistor, a second bipolar transistor, a first resistor provided between the respective bases of the first and second bipolar transistors, and a capacitor provided between the base of the second bipolar transistor and the ground. Since the first resistor and the capacitor are provided such that the circuit undergoes RC oscillation in response to the third harmonic of an input signal, the third and higher-order harmonics can be reduced.
    Type: Application
    Filed: August 28, 2003
    Publication date: April 1, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Daisuke Watanabe, Junji Itoh, Ikuo Imanishi
  • Patent number: 6667657
    Abstract: An RF variable gain amplifying device has an amplifying circuit, a switch element connected in parallel with the amplifying circuit, and a resistor connected in parallel with the amplifying circuit and with the switch element. The amplifying circuit does not operate when the switch element is in the ON state but operates when the switch element is in the OFF state. A potential at each of the input and output terminals of the switch element is lower when the switch element is in the ON state than when the switch element is in the OFF state.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: December 23, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshifumi Nakatani, Junji Ito, Ikuo Imanishi
  • Patent number: 6664609
    Abstract: Disclosed is a circuit layout of a differential amplification circuit that constitutes a Gilbert cell, in which two multiple finger bipolar transistors forming a differential amplifier are positioned substantially axially symmetrical to each other. The longitudinal direction of each finger is orthogonal to the axis of symmetry. A wiring connected to an emitter electrode of each one of the transistors is laid so as to extend in a direction opposite to the other one of the transistors.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: December 16, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Junji Ito, Ikuo Imanishi
  • Publication number: 20020140502
    Abstract: An RF variable gain amplifying device has an amplifying circuit, a switch element connected in parallel with the amplifying circuit, and a resistor connected in parallel with the amplifying circuit and with the switch element. The amplifying circuit does not operate when the switch element is in the ON state but operates when the switch element is in the OFF state. A potential at each of the input and output terminals of the switch element is lower when the switch element is in the ON state than when the switch element is in the OFF state.
    Type: Application
    Filed: February 14, 2002
    Publication date: October 3, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshifumi Nakatani, Junji Ito, Ikuo Imanishi
  • Publication number: 20020135045
    Abstract: Disclosed is a circuit layout of a differential amplification circuit that constitutes a Gilbert cell, in which two multiple finger bipolar transistors forming a differential amplifier are positioned substantially axially symmetrical to each other. The longitudinal direction of each finger is orthogonal to the axis of symmetry. A wiring connected to an emitter electrode of each one of the transistors is laid so as to extend in a direction opposite to the other one of the transistors.
    Type: Application
    Filed: March 21, 2002
    Publication date: September 26, 2002
    Inventors: Junji Ito, Ikuo Imanishi
  • Publication number: 20020063270
    Abstract: A high frequency switch circuit device includes an FET to be a switching element on a semiconductor substrate. The FET includes an n-type well, a gate electrode, a source layer and a drain layer. An n-type well line to be connected to an n-type well layer to be a back gate is connected to a voltage supply node via an inductor. The flow of a high frequency signal between the voltage supply node and the n-type well layer is blocked by the inductor, and the flow of a high frequency signal in the vertical direction is blocked by a depletion layer extending between the n-type well and a p-type substrate region. Moreover, the flow of a high frequency signal in the horizontal direction is blocked by a trench separation insulative layer.
    Type: Application
    Filed: November 27, 2001
    Publication date: May 30, 2002
    Inventors: Toshifumi Nakatani, Junji Ito, Ikuo Imanishi
  • Patent number: 5627490
    Abstract: An amplifier circuit for amplifying a change in a resistance value of a magnetic resistance element is formed by connecting a first and a second current mirror circuits having the same structure in cascode, so that a voltage change is amplified without using a capacitive coupling. Hence, a high-pass filter is not created as a parasitic circuit, whereby a gain is maintained high in the low frequency region and a low frequency characteristic is excellent. Further, since control electrodes of transistors which form each current mirror circuit are grounded through the capacitance, a noise is reduced without using a conventional feedback circuit. This eliminates an influence of the feedback circuit over a high frequency characteristic, and therefore, a high frequency characteristic becomes excellent.
    Type: Grant
    Filed: February 6, 1996
    Date of Patent: May 6, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koji Sushihara, Takashi Yamamoto, Ikuo Imanishi, Tsuyoshi Nakamura, Michinori Kishimoto, Kenichi Ishida