Abstract: An all digital PLL-based data detector for use in a disc media reproducer or recorder for receiving input read data read from a disc storage medium and providing an output sync signal and synchronized read data with jitter substantially eliminated. The PLL circuit is provided with a circuit for limiting the fed-back count value to a predetermined range so as to limit the internal sync signal to a desired range, a circuit for resetting a predetermined portion of the digital PLL-based circuit during an invalid period when input read data are expected to be invalid to thereby ensuring a normal operation after the invalid period, and/or a circuit for generating, from a given clock signal of a first frequency, a second clock signal of a second frequency different from the first frequency to thereby support a different data rate.

Abstract: An all digital PLL-based data detector for use in a disc media reproducer or recorder for receiving input read data read from a disc storage medium and providing an output sync signal and synchronized read data with jitter substantially eliminated. The PLL circuit is provided with a circuit for limiting the fed-back count value to a predetermined range so as to limit the internal sync signal to a desired range, a circuit for resetting a predetermined portion of the digital PLL-based circuit during an invalid period when input read data are expected to be invalid to thereby ensuring a normal operation after the invalid period, and/or a circuit for generating, from a given clock signal of a first frequency, a second clock signal of a second frequency different from the first frequency to thereby support a different data rate.

Abstract: A floppy disk drive has an exciting current supplying circuit and a control circuit for controlling the exciting current supplying circuit so that the exciting current is increased to a first predetermined value, reduced to a second predetermined value and then decreased to zero or raised to a third predetermined value. This arrangement has the effect of suppressing the counter electromotive force induced by the self induction of the motor coil, reducing noises on a power line and thereby preventing irregular rotation of the stepping motor.

Abstract: A logic signal selection setting apparatus for facilitating verification and change of set states of various logic signal selection modes in a floppy disk apparatus comprises a memory of which data can be rewritten at a given time, a signal generating circuit for generating a signal for reading at a predetermined time the data written in the memory at the given time, and a shift register supplied at an input with the data read out from the memory at the time generated by the read signal generating circuit to thereby set up a signal selection mode for selecting an interface output signal of a logic circuit or a signal for lighting a light emission element for displaying the in-service state of the apparatus.

Abstract: A floppy disk drive (FDD) includes a writable non-volatile memory which stores information indicative of a correction amount due to a difference between the reference position of a medium for the FDD and the position of an index detected by an index sensor and a digital delay circuit for deciding an adjustment time by producing an index signal which is provided by delaying the index detection pulse supplied from the index sensor by a count value corresponding to the correction amount supplied from the non-volatile memory. The index adjustment pulse is delayed by the count value so that the relative positions of indices of several FDD's can be made coincident with each other.