Patents by Inventor Ikuo Mashimo

Ikuo Mashimo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10818538
    Abstract: Provided are a wafer holding mechanism for a rotary table and a method and a wafer rotating and holding device, which enable change of a holding position of the wafer during spin processing while maintaining the posture of the wafer, enable reduction of marks of outer peripheral pins due to etching, and enable reduction of insufficient cleaning or uneven cleaning. The wafer holding mechanism for a rotary table comprises a rotary table configured to hold a wafer on an upper surface thereof, and a plurality of movable outer peripheral pins provided in the rotary table and configured to hold an outer periphery of the wafer. The plurality of movable outer peripheral pins comprise a plurality of first movable outer peripheral pins and a plurality of second movable outer peripheral pins configured to hold the wafer at positions different from positions at which the wafer is held by the first movable outer peripheral pins.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: October 27, 2020
    Assignee: MIMASU SEMICONDUCTOR INDUSTRY CO., LTD.
    Inventors: Ikuo Mashimo, Masaki Tamura, Hideaki Nagai
  • Publication number: 20190295879
    Abstract: Provided are a wafer holding mechanism for a rotary table and a method and a wafer rotating and holding device, which enable change of a holding position of the wafer during spin processing while maintaining the posture of the wafer, enable reduction of marks of outer peripheral pins due to etching, and enable reduction of insufficient cleaning or uneven cleaning. The wafer holding mechanism for a rotary table comprises a rotary table configured to hold a wafer on an upper surface thereof, and a plurality of movable outer peripheral pins provided in the rotary table and configured to hold an outer periphery of the wafer. The plurality of movable outer peripheral pins comprise a plurality of first movable outer peripheral pins and a plurality of second movable outer peripheral pins configured to hold the wafer at positions different from positions at which the wafer is held by the first movable outer peripheral pins.
    Type: Application
    Filed: May 18, 2017
    Publication date: September 26, 2019
    Inventors: Ikuo MASHIMO, Masaki TAMURA, Hideaki NAGAI
  • Publication number: 20100269903
    Abstract: Provided are: a safe, low-cost method of producing a polycrystalline silicon substrate excellent in photoelectric conversion efficiency by which a uniform, fine uneven structure suited to a solar cell can be simply formed on the surface of the polycrystalline silicon substrate; and a polycrystalline silicon substrate having a uniform, fine, pyramid-shaped uneven structure so that its reflectance can be significantly reduced. The uneven structure is formed on the surface of the polycrystalline silicon substrate by etching the polycrystalline silicon substrate with an alkaline etching solution containing at least one kind selected from the group consisting of a carboxylic acid having 1 or more and 12 or less carbon atoms and each having at least one carboxyl group in one molecule, and salts of the acids.
    Type: Application
    Filed: November 28, 2008
    Publication date: October 28, 2010
    Applicants: MIMASU SEMICONDUCTOR INDUSTRY CO., LTD., WAKO PURE CHEMICAL INDUSTRIES, LTD.
    Inventors: Masato Tsuchiya, Ikuo Mashimo, Yoshimichi Kimura, Takehisa Kato, Masahiko Kakizawa
  • Publication number: 20090266414
    Abstract: Provided are: a process for producing safely at low cost a semiconductor substrate excellent in photoelectric conversion efficiency, and stable in an etching rate and a pyramid shape, which is capable of uniformly forming a fine uneven structure with desired size suitable for a solar cell on the surface thereof; a semiconductor substrate for solar application having a uniform and fine pyramid-shaped uneven structure in a plane; and an etching solution for forming a semiconductor substrate having a uniform and fine uneven structure, which has a high stability at initial use. The process comprises etching a semiconductor substrate with the use of an alkaline etching solution containing at least one kind selected from the group consisting of carboxylic acids having a carbon number of 1 to 12 and having at least one carboxyl group in a molecule, salts thereof, and silicon, to thereby form an uneven structure on the surface of the semiconductor substrate.
    Type: Application
    Filed: April 20, 2007
    Publication date: October 29, 2009
    Applicants: Mimasu Semiconductor Industry Co., Ltd., Space Energy Corporation
    Inventors: Masato Tsuchiya, Ikuo Mashimo, Yoshimichi Kimura
  • Publication number: 20090166780
    Abstract: Provided is: a process for producing safely at low cost a semiconductor substrate excellent in photoelectric transduction efficiency, in which a fine uneven structure suitable for a solar cell can be formed uniformly with desired size on the surface of the semiconductor substrate; a semiconductor substrate for solar application in which a uniform and fine pyramid-shaped uneven structure is provided uniformly within the surface thereof, and an etching solution for forming a semiconductor substrate having a uniform and fine uneven structure. A semiconductor substrate is etched with the use of an alkali etching solution containing at least one kind selected from the group consisting of carboxylic acids having a carbon number of 1 to 12 and having at least one carboxyl group in a molecule, and salts thereof, to thereby form an uneven structure on the surface of the semiconductor substrate.
    Type: Application
    Filed: February 27, 2009
    Publication date: July 2, 2009
    Applicants: MIMASU SEMICONDUCTOR INDUSTRY CO., LTD., SPACE ENERGY CORPORATION
    Inventors: Masato Tsuchiya, Ikuo Mashimo, Yoshimichi Kimura
  • Patent number: 7364616
    Abstract: It is an object of the present invention to provide a wafer release method capable of releasing a wafer safely, simply and certainly and improving a wafer releasing rate, a wafer release apparatus and a wafer release transfer machine using the wafer release apparatus. A wafer release method of the present invention comprises the steps of: pressing the uppermost wafer along an axis direction (L-L?) shifted by an angle in the range of from 15 to 75 degrees from a crystal habit line axis (A-A?) or (B-B?) of the uppermost wafer clockwise or counterclockwise; bending upwardly the peripheral portion of the uppermost wafer so as to cause a bending stress in the uppermost wafer in the axis direction (L-L?) shifted by the angle; blowing a fluid into a clearance between the lower surface of the uppermost wafer and the upper surface of the lower wafer adjacent thereto; and raising the uppermost wafer for releasing.
    Type: Grant
    Filed: May 13, 2003
    Date of Patent: April 29, 2008
    Assignee: Mimasu Semiconductor Industry Co. Ltd
    Inventors: Masato Tsuchiya, Ikuo Mashimo, Koichi Saito
  • Publication number: 20080048279
    Abstract: Provided is: a process for producing safely at low cost a semiconductor substrate excellent in photoelectric transduction efficiency, in which a fine uneven structure suitable for a solar cell can be formed uniformly with desired size on the surface of the semiconductor substrate; a semiconductor substrate for solar application in which a uniform and fine pyramid-shaped uneven structure is provided uniformly within the surface thereof; and an etching solution for forming a semiconductor substrate having a uniform and fine uneven structure. A semiconductor substrate is etched with the use of an alkali etching solution containing at least one kind selected from the group consisting of carboxylic acids having a carbon number of 1 to 12 and having at least one carboxyl group in a molecule, and salts thereof, to thereby form an uneven structure on the surface of the semiconductor substrate.
    Type: Application
    Filed: October 26, 2005
    Publication date: February 28, 2008
    Inventors: Masato Tsuchiya, Ikuo Mashimo, Yoshimichi Kimura
  • Publication number: 20060286769
    Abstract: It is an object of the present invention to provide a wafer release method capable of releasing a wafer safely, simply and certainly and improving a wafer releasing rate, a wafer release apparatus and a wafer release transfer machine using the wafer release apparatus. A wafer release method of the present invention comprises the steps of: pressing the uppermost wafer along an axis direction (L-L?) shifted by an angle in the range of from 15 to 75 degrees from a crystal habit line axis (A-A?) or (B-B?) of the uppermost wafer clockwise or counterclockwise; bending upwardly the peripheral portion of the uppermost wafer so as to cause a bending stress in the uppermost wafer in the axis direction (L-L?) shifted by the angle; blowing a fluid into a clearance between the lower surface of the uppermost wafer and the upper surface of the lower wafer adjacent thereto; and raising the uppermost wafer for releasing.
    Type: Application
    Filed: August 13, 2003
    Publication date: December 21, 2006
    Inventors: Masato Tsuchiya, Ikuo Mashimo, Koichi Saito