Patents by Inventor Ikuo Suemune

Ikuo Suemune has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4845535
    Abstract: The disclosed light emitting semiconductor device has an n-type (or p-type) base region sandwiched by a p-type (or n-type) emitter region and a p-type (or n-type) collector region. An injecting voltage source is connected across the emittter region and base region so as to apply a constant voltage therebetween, while a control voltage source is connected across the emitter region and the collector region so as to selectively apply a reverse bias to a base-collector junction for controlling recombination of carriers injected to the base region. The control voltage source produces such non-emitting period voltage and emitting period voltage that carriers injected during the non-emitting period voltage are captured in the base region while the carriers thus captured are allowed to recombine during the emitting period voltage.
    Type: Grant
    Filed: January 19, 1988
    Date of Patent: July 4, 1989
    Assignee: Hiroshima University
    Inventors: Masamichi Yamanishi, Ikuo Suemune, Yasuo Kan
  • Patent number: 4672577
    Abstract: Adjacent memory layers of a multi-layered integrated device as optically coupled, so that data written on one layer can be copied onto its adjacent layers through the optical coupling.
    Type: Grant
    Filed: February 15, 1985
    Date of Patent: June 9, 1987
    Assignee: Hiroshima University
    Inventors: Masataka Hirose, Masamichi Yamanishi, Yukio Osaka, Tadashi Ae, Tadao Ichikawa, Noriyoshi Yoshida, Ikuo Suemune