Patents by Inventor Ikuo Takada

Ikuo Takada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5757409
    Abstract: Selective pattern exposure with high reliability is made possible by a desired pattern of repeated pattern and a non-repeated pattern. Exposure technology is obtained to enable improvement of preparation efficiency of pattern data and to secure inspection of an aperture pattern. With the invention, an electron beam is used as focused beam, and a pattern exposure apparatus of a batch transfer system for transferring repeated pattern and non-repeated pattern of plural graphics of a semiconductor integrated circuit or the like comprises an EB drawing section for controlling the beam and irradiating beam onto a sample, a control I/O section, a drawing control section and a data storage section. In the EB drawing section, a semiconductor wafer is mounted on a platform, and in the path of the electron beam from the electron beam source to the stage, a first mask, a blanking electrode, an electron lens, a first deflector, a second deflector, a second mask and a third deflector are installed.
    Type: Grant
    Filed: May 10, 1996
    Date of Patent: May 26, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Yoshihiko Okamoto, Haruo Yoda, Ikuo Takada, Yukinobu Shibata, Akira Hirakawa, Norio Saitou, Shinji Okazaki, Fumio Murai
  • Patent number: 5557314
    Abstract: Selective pattern exposure with high reliability is made possible by a desired pattern of repeated pattern and a non-repeated pattern. Exposure technology is obtained to enable improvement of preparation efficiency of pattern data and to secure inspection of an aperture pattern. With the invention, an electron beam is used as focused beam, and a pattern exposure apparatus of a batch transfer system for transferring repeated pattern and non-repeated pattern of plural graphics of a semiconductor integrated circuit or the like comprises an EB drawing section for controlling the beam and irradiating beam onto a sample, a control I/O section, a drawing control section and a data storage section. In the EB drawing section, a semiconductor wafer is mounted on a platform, and in the path of the electron beam from the electron beam source to the stage, a first mask, a blanking electrode, an electron lens, a first deflector, a second deflector, a second mask and a third deflector are installed.
    Type: Grant
    Filed: June 16, 1993
    Date of Patent: September 17, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Yoshihiko Okamoto, Haruo Yoda, Ikuo Takada, Yukinobu Shibata, Akira Hirakawa, Norio Saitou, Shinji Okazaki, Fumio Murai
  • Patent number: 5206517
    Abstract: An electron beam lithographic method in which a sample is irradiated with an electron beam, wherein an extreme point of a contour of a pattern is calculated and a lithographic area is divided into a first region that is surrounded by straight lines drawn from the extreme point in parallel with the x-axis and the y-axis of the sample and by said pattern, and second regions in order to be lithographed.
    Type: Grant
    Filed: November 27, 1991
    Date of Patent: April 27, 1993
    Assignees: Hitachi, Ltd., Hitachi Instrument Engineering Co., Ltd.
    Inventors: Yukinobu Shibata, Ikuo Takada, Akira Hirakawa, Tadao Konishi