Patents by Inventor Ikuo Tsuchiya

Ikuo Tsuchiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7834193
    Abstract: The present invention provides an industrial method production of silodosin, which is useful for a therapeutic agent for dysuria associated with benign prostatic hyperplasia. The production of silodosine is characterized by mixing 3-{7-cyano-5-[(2R)-2-({2-[2-(2,2,2-trifluoroethoxy)-phenoxy]ethyl}amino]propyl]-2,3-dihydro-1H-indol-1-yl}-propyl benzoate and oxalic acid to yield the oxalate, subsequently hydrolyzing the oxalate salt to yield 1-(3-hydroxypropyl)-5-[(2R)-2-({2-[2-(2,2,2-trifluoroethoxy)phenoxy]ethyl}amino]propyl]-2,3-dihydro-1H-indole-7-carbonitrile and hydrolyzing the same, and manufacturing intermediates used therefore.
    Type: Grant
    Filed: April 16, 2007
    Date of Patent: November 16, 2010
    Assignee: Kissei Pharmaceutical Co., Ltd.
    Inventors: Toshiaki Yamaguchi, Ikuo Tsuchiya, Ken Kikuchi, Takashi Yanagi
  • Publication number: 20070197627
    Abstract: The present invention provides an industrial method production of silodosin, which is useful for a therapeutic agent for dysuria associated with benign prostatic hyperplasia. The production of silodosine is characterized by mixing 3-{7-cyano-5-[(2R)-2-({(2-[2-(2,2,2-trifluoroethoxy)-phenoxy]ethyl}amino]propyl]-2,3-dihydro-1H-indol-1-yl}-propyl benzoate and oxalic acid to yield the oxalate, subsequently hydrolyzing the oxalate salt to yield 1-(3-hydroxypropyl)-5-[(2R)-2-({2-[2-(2,2,2-trifluoroethoxy)phenoxy]ethyl}amino]propyl]-2,3-dihydro-1H-indole-7-carbonitrile and hydrolyzing the same, and manufacturing intermediates used therefore.
    Type: Application
    Filed: April 16, 2007
    Publication date: August 23, 2007
    Inventors: Toshiaki Yamaguchi, Ikuo Tsuchiya, Ken Kikuchi, Takashi Yanagi
  • Patent number: 5146120
    Abstract: A low-noise output buffer circuit of this invention comprises a P-channel MOSFET having a source connected to a power source potential, for outputting the power source potential according to a first input signal, an N-channel MOSFET having a source connected to a ground potential, for outputting the ground potential according to a second input signal, a bipolar transistor having a collector connected to the power source potential, an emitter connected to an output terminal and a base connected to the drain of the P-channel MOSFET, and a diode having a cathode connected to the drain of the N-channel MOSFET and an anode connected to the base of the NPN bipolar transistor.
    Type: Grant
    Filed: July 25, 1991
    Date of Patent: September 8, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Kimura, Kenji Matsuo, Ikuo Tsuchiya, Masayo Fukuda
  • Patent number: 5063433
    Abstract: A semiconductor device comprises a first pad region applied with a first potential, a first line led from the first pad region and connected to a first circuit, a second pad region integrated with the first pad region and applied also with the first potential, and a second line led from the second pad region connected to a second circuit and overlapped with the first line.
    Type: Grant
    Filed: April 13, 1990
    Date of Patent: November 5, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenji Matsuo, Tadashi Nonaka, Ikuo Tsuchiya
  • Patent number: 4994687
    Abstract: A retriggerable multivibrator is disclosed which comprises a first delay circuit connected for delaying an input signal a predetermined time, a second delay circuit connected to receive an output of the first delay circuit and having a enable or disable function, a flip-flop circuit connected to be set or reset in accordance with an input signal and output signal from the second delay circuit, and a control circuit for detecting a subsequent input signal within a predetermined delay time to enable or disable the second delay circuit.
    Type: Grant
    Filed: November 29, 1988
    Date of Patent: February 19, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinji Fujii, Ikuo Tsuchiya, Kazuhiko Kasai
  • Patent number: 4859970
    Abstract: A voltage controlled oscillator comprises a phase locked loop section and a voltage controlled oscillator section. The phase locked loop section is coupled with an input signal at a reference frequency and a reference potential, and performs a signal feedback control so as to obtain a constant delay time of a first variable delay circuit contained in the phase locked loop section. The voltage controlled oscillator section controls a delay time of a second variable delay circuit in a ring oscillator by a control input voltage and an output voltage of a low-pass filter contained in the phase locked loop section, and produces a signal oscillating at a frequency as determined by the delay time. In the voltage controlled oscillator thus arranged, the output frequency is determined by controlling a delay time of the second variable delay circuit in the voltage controlled oscillator section.
    Type: Grant
    Filed: November 29, 1988
    Date of Patent: August 22, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenji Matsuo, Ikuo Tsuchiya