Abstract: A memory module may include a first memory group and a second memory group; and a first clock signal line and a second clock signal line via which the first clock signal and the second clock signal propagate from the buffer chip to the first memory group and the second memory group, respectively, wherein distances that the first clock signals propagate from a buffer chip to a plurality of memory chips of the first memory group via the first clock signal line are identical to one another and are referred to as a first distance, and distances that the second clock signals propagate from the buffer chip to a plurality of memory chips of the second memory group via the second clock signal line are identical to one another and are referred to as a second distance.