Abstract: Provided is a method of manufacturing a zinc-plated steel sheet. The method includes: coating a metal on the steel sheet on a steel sheet; annealing the metal coated steel sheet; and zinc plating the annealed steel sheet by dipping in a molten zinc plating bath. Further provided is a method of manufacturing a hot-press part including: coating a metal on the steel sheet on a steel sheet; annealing the metal coated steel sheet; zinc plating the annealed steel sheet by dipping in a molten zinc plating bath; heating the zinc-plated steel sheet; and press forming the heated steel sheet.

Abstract: An original data signal is transmitted by a predetermined transmission power, the data signal distorted during transmission is received, and the received signal is output after being restored to the original data signal, the SNR for each subchannel is calculated and a higher power is allocated to a subchannel having a higher SNR and a lower power is allocated to a subchannel having a lower SNR. If the transmission power of each subchannel exceeds a maximum limit, the maximum limit is redetermined as the transmission power of the subchannels whose transmission power exceeds the maximum limit. Then, the transmission power of a subchannel whose SNR is negative is determined if the transmission power of each subchannel does not exceed the maximum limit or the above redetermination step is completed. Thereafter, the transmission power of each subchannel is controlled to the determined power.

Abstract: A frequency-selective interference signal detecting apparatus and method thereof generates as many tone signals as the number of a frequency-selective interference signals at the transmission side of a transmission system and one tone signal corresponding to an optional frequency at an occupied band frequency of the transmission system, transmits all generated tone signals to a receiving side of the transmission system through the transmission channel selectively, computes an SNR with regard to each tone signal by receiving these tone signals at the receiving side, compares the calculated SNR with a preestablished reference value, detects whether or not each of the frequency-selective interference signals exist, provides the degree of such interference, and makes several frequency-selective interference signals detectable so as to raise transmission efficiency of a data signal in the transmission system.

Abstract: A receiver of a superpose modulated signal comprises: a symbol timing recovery circuit for receiving the superpose modulated signal and producing a symbol timing signal, the period of the symbol timing signal being the same as the period of the superpose modulated signal; a correlation signal generator for receiving the symbol timing signal and generating a correlation signal as ##EQU1## wherein B is an adjustable parameter, P is a predetermined maximum value and T refers to the symbol duration; a correlation multiplier for multiplying the superpose modulated signal by the correlation signal; and an integrator for integrating the output of the correlation multiplier for every symbol period.

Abstract: A multi-level superposed amplitude-modulated baseband signal processor which has simple hardware structure and a filtering effect for bandwidth and power efficiency in a digital transmission system includes a data delayer, a signal level converter, an operator, two pulse generators, two adders and two amplifiers, thereby eliminating the need for conventionally required pulse waveforms and simplifying circuit structure. Specifically, when the number of the multi-levels is desired to be changed, the relevant multi-level superposed amplitude-modulated baseband signal can be provided by a simple change of the processor.

Abstract: The path memory apparatus of a Viterbi decoder having an add-compare-select circuit for producing path select signals and a minimum state number every symbol period comprises a first selector for selecting between the path select signals and feedback signals in accordance with a start clock; a memory for receiving the output of a first selector and shifting the received output thereof in one direction in accordance with a system clock, and applying the output as the feedback signal; a second selector for selecting one among the outputs of the memory in accordance with a current state number; a third selector for selecting between the minimum state number and a next state number in accordance with the start clock, to produce the current state number; a trace-back calculator for receiving the current state number and the output of second selector and then producing the next state number; and a data convertor for performing an operating on the next state numbers, to produce a decoded information symbol per each

Abstract: An automatic gain controller includes a signal detector receiving an output signal from an amplifier for converting the signal into a DC current changing according to the output signal; first and second time-constant controllers receiving the DC current for removing an AC component to produce first and second pure DC components with different, predetermined time-response characteristics; a voltage subtracter receiving and subtracting the first and second pure DC components to produce a resultant voltage; a voltage comparator for comparing the resultant voltage with a predetermined reference voltage; a switch responsive to the voltage comparator for controlling transmission of the first pure DC component; a voltage sink for discharging the first pure DC component when the switch is closed; and a control voltage amplifier receiving the first pure DC component when the switch is open for producing an output signal to control the gain of the receiving amplifier.