Abstract: A motor device may include: a motor housing including a mounting hole; a motor cover mounted on the motor housing, and including a connection hole facing the mounting hole; a coupling member inserted into the mounting hole and the connection hole, and mounted in the mounting hole and the connection hole; and a fastening member coupled to a main housing through the coupling member.

Abstract: A steering reaction force apparatus for a vehicle includes: a housing that is openable and closable by a cover unit, a stator unit fixed to an inside of the housing, a rotor unit disposed to face the stator unit and to be rotated by electromagnetic interaction with the stator unit, a transmission shaft unit connected to the rotor unit to rotate in conjunction with the rotor unit, a power transmission unit disposed inside the rotor unit to transmit a rotational force of the transmission shaft unit to a steering shaft, and a retainer unit to support the power transmission unit with respect to the cover unit.

Abstract: A steering reaction force apparatus for a vehicle includes: a housing that is openable and closable by a cover unit, a stator unit fixed to an inside of the housing, a rotor unit disposed to face the stator unit and to be rotated by electromagnetic interaction with the stator unit, a transmission shaft unit connected to the rotor unit to rotate in conjunction with the rotor unit, a power transmission unit disposed inside the rotor unit to transmit a rotational force of the transmission shaft unit to a steering shaft, and a retainer unit to support the power transmission unit with respect to the cover unit.

Abstract: A steering reaction force generation device for a vehicle may include a housing; a transfer shaft part rotatably installed in the housing, and disposed coaxially with a steering shaft; a stator part fixed to the inside of the housing; a rotor part connected to the transfer shaft part, and configured to rotate the transfer shaft part through an electromagnetic interaction with the stator part; and a power transfer part installed in the rotor part, and configured to transfer a rotational force of the transfer shaft part to the steering shaft.

Abstract: A motor device may include: a motor housing including a mounting hole; a motor cover mounted on the motor housing, and including a connection hole facing the mounting hole; a coupling member inserted into the mounting hole and the connection hole, and mounted in the mounting hole and the connection hole; and a fastening member coupled to a main housing through the coupling member.

Abstract: An integrated circuit device includes a first fin separation insulating portion over the first device region; a pair of first fin-type active regions apart from each other with the first fin separation insulating portion therebetween and collinearly extending in a first horizontal direction; a first dummy gate structure vertically overlapping the first fin separation insulating portion; a second fin separation insulating portion apart from the first fin separation insulating portion and arranged over the second device region; and a plurality of second fin-type active regions apart from each other with the second fin separation insulating portion therebetween in the second device region and collinearly extending in the first horizontal direction, wherein a vertical level of a lowermost surface of the second fin separation insulating portion is equal to or lower than a vertical level of a lowermost surface of the first fin separation insulating portion.

Abstract: An integrated circuit device includes a first fin separation insulating portion over the first device region; a pair of first fin-type active regions apart from each other with the first fin separation insulating portion therebetween and collinearly extending in a first horizontal direction; a first dummy gate structure vertically overlapping the first fin separation insulating portion; a second fin separation insulating portion apart from the first fin separation insulating portion and arranged over the second device region; and a plurality of second fin-type active regions apart from each other with the second fin separation insulating portion therebetween in the second device region and collinearly extending in the first horizontal direction, wherein a vertical level of a lowermost surface of the second fin separation insulating portion is equal to or lower than a vertical level of a lowermost surface of the first fin separation insulating portion.

Abstract: An integrated circuit device includes a first fin separation insulating portion over the first device region; a pair of first fin-type active regions apart from each other with the first fin separation insulating portion therebetween and collinearly extending in a first horizontal direction; a first dummy gate structure vertically overlapping the first fin separation insulating portion; a second fin separation insulating portion apart from the first fin separation insulating portion and arranged over the second device region; and a plurality of second fin-type active regions apart from each other with the second fin separation insulating portion therebetween in the second device region and collinearly extending in the first horizontal direction, wherein a vertical level of a lowermost surface of the second fin separation insulating portion is equal to or lower than a vertical level of a lowermost surface of the first fin separation insulating portion.

Abstract: An integrated circuit device includes a substrate from which a plurality of fin-type active regions protrude, the plurality of fin-type active regions extending in parallel to one another in a first direction, and a plurality of gate structures and a plurality of fin-isolation insulating portions extending on the substrate in a second direction crossing the first direction and at a constant pitch in the first direction, wherein a pair of fin-isolation insulating portions from among the plurality of fin-isolation insulating portions are between a pair of gate structures from among the plurality of gate structures, and the plurality of fin-type active regions include a plurality of first fin-type regions and a plurality of second fin-type regions.

Abstract: An integrated circuit device includes a substrate having a first region and a second region, a first fin-isolation insulating portion in each of the first region and the second region and having a first width in a first direction, a pair of fin-type active regions spaced apart from each other in each of the first region and the second region with the first fin-isolation insulating portion therebetween, and extending in a straight line in the first direction, a pair of second fin-isolation insulating portions contacting, in each of the first region and the second region, two side walls of the first fin-isolation insulating portion, respectively, each of the two side walls facing the opposite sides in the first direction, and a plurality of gate structures extending in the second direction and comprising a plurality of dummy gate structures.

Abstract: An integrated circuit device includes a first fin separation insulating portion over the first device region; a pair of first fin-type active regions apart from each other with the first fin separation insulating portion therebetween and collinearly extending in a first horizontal direction; a first dummy gate structure vertically overlapping the first fin separation insulating portion; a second fin separation insulating portion apart from the first fin separation insulating portion and arranged over the second device region; and a plurality of second fin-type active regions apart from each other with the second fin separation insulating portion therebetween in the second device region and collinearly extending in the first horizontal direction, wherein a vertical level of a lowermost surface of the second fin separation insulating portion is equal to or lower than a vertical level of a lowermost surface of the first fin separation insulating portion.

Abstract: An integrated circuit device includes a first fin separation insulating portion over the first device region; a pair of first fin-type active regions apart from each other with the first fin separation insulating portion therebetween and collinearly extending in a first horizontal direction; a first dummy gate structure vertically overlapping the first fin separation insulating portion; a second fin separation insulating portion apart from the first fin separation insulating portion and arranged over the second device region; and a plurality of second fin-type active regions apart from each other with the second fin separation insulating portion therebetween in the second device region and collinearly extending in the first horizontal direction, wherein a vertical level of a lowermost surface of the second fin separation insulating portion is equal to or lower than a vertical level of a lowermost surface of the first fin separation insulating portion.

Abstract: An integrated circuit device includes a substrate including a first device region and a second device region; a first fin separation insulating portion on the first device region; a pair of first fin-type active regions spaced from each other with the first fin separation insulating portion therebetween in the first device region and collinearly extending in a first horizontal direction; a second fin separation insulating portion extending in a second horizontal direction over the first device region and the second device region; and a pair of second fin-type active regions spaced from each other with the second fin separation insulating portion therebetween and collinearly extending in the first horizontal direction, wherein the first fin separation insulating portion and the second fin separation insulating portion vertically overlap each other.

Abstract: An integrated circuit device includes a substrate including a first device region and a second device region; a first fin separation insulating portion on the first device region; a pair of first fin-type active regions spaced from each other with the first fin separation insulating portion therebetween in the first device region and collinearly extending in a first horizontal direction; a second fin separation insulating portion extending in a second horizontal direction over the first device region and the second device region; and a pair of second fin-type active regions spaced from each other with the second fin separation insulating portion therebetween and collinearly extending in the first horizontal direction, wherein the first fin separation insulating portion and the second fin separation insulating portion vertically overlap each other.

Abstract: In one embodiment, the semiconductor device includes at least one active fin protruding from a substrate, a first gate electrode crossing the active fin, and a first impurity region formed on the active fin at a first side of the first gate electrode. At least a portion of the first impurity region is formed in a first epitaxial layer portion on the active fin. A second impurity region is formed on the active fin at a second side of the first gate electrode. The second impurity region has at least a portion not formed in an epitaxial layer.

Abstract: A method of fabricating a semiconductor device includes forming a dummy gate on a substrate, forming a dummy gate mask on the dummy gate, forming a gate spacer on the substrate, the gate spacer covering at least one sidewall surface of the dummy gate and the dummy gate mask, forming a recess on at least one side of the dummy gate by etching the substrate, and forming an epitaxial layer in the recess using an epitaxial growth process. The forming of the dummy gate mask includes forming an oxide layer and a dummy gate mask layer on the dummy gate.

Abstract: In one embodiment, the semiconductor device includes at least one active fin protruding from a substrate, a first gate electrode crossing the active fin, and a first impurity region formed on the active fin at a first side of the first gate electrode. At least a portion of the first impurity region is formed in a first epitaxial layer portion on the active fin. A second impurity region is formed on the active fin at a second side of the first gate electrode. The second impurity region has at least a portion not formed in an epitaxial layer.

Abstract: Provided is a semiconductor device having mid-gap work function metal gate electrodes. The semiconductor device includes a plurality of gate patterns, and the gate patterns have different gate electrode metals from each other or different gate electrode metal thicknesses from each other.

Abstract: A method of fabricating a semiconductor device includes forming a dummy gate on a substrate, forming a dummy gate mask on the dummy gate, forming a gate spacer on the substrate, the gate spacer covering at least one sidewall surface of the dummy gate and the dummy gate mask, forming a recess on at least one side of the dummy gate by etching the substrate, and forming an epitaxial layer in the recess using an epitaxial growth process. The forming of the dummy gate mask includes forming an oxide layer and a dummy gate mask layer on the dummy gate.

Abstract: Provided is a semiconductor device having mid-gap work function metal gate electrodes. The semiconductor device includes a plurality of gate patterns, and the gate patterns have different gate electrode metals from each other or different gate electrode metal thicknesses from each other.