Abstract: An e-fuse structure includes an anode, a cathode, a fuse part connecting the anode and the cathode to each other, and a dielectric contacting the fuse part. The dielectric is configured to apply a stress to the fuse part, where the stress constructively acting on a migration effect of atoms constituting the fuse part. The migration effect is generated by electromigration and thermomirgration.

Abstract: There is provided an organic thin film transistor and a method of manufacturing the same. The organic thin film transistor includes: an insulating substrate on which a plurality of barrier ribs and a plurality of grooves partitioned by the barrier ribs are formed; source and drain electrodes each formed on the grooves spaced apart from each other among the plurality of grooves; a gate electrode formed on the groove between the source and drain electrodes; an opening formed by etching the barrier ribs between the source electrode and the gate electrode and between the gate electrode and the drain electrode; a gate insulating film formed on the opening; and an organic semiconductor layer formed on the gate insulating film. The organic thin film transistor is capable of mass production and has excellent electrical characteristics.

Abstract: An e-fuse structure includes an anode, a cathode, a fuse part connecting the anode and the cathode to each other, and a dielectric contacting the fuse part. The dielectric is configured to apply a stress to the fuse part, where the stress constructively acting on a migration effect of atoms constituting the fuse part. The migration effect is generated by electromigration and thermomirgration.

Abstract: A magnetic random access memory with write and read circuits using magnetic tunnel junction (MTJ) devices wherein MTJs are arranged at cross points of word lines and read bit lines to form memory cells. After write bit lines and read bit lines are arranged parallel to each other, current bypass paths are formed allowing current to bypass the side and bottom of the MTJ. Thus, an electric field having intensity enough to change the magnetization direction of the MTJ, is applied only to each selected cell. In a write operation, the magnetization direction of a free layer in the MTJ is formed to be parallel or antiparallel to the magnetization direction of a pinned ferromagnetic layer by the current passing through the word line and the current bypass path.

Abstract: A magnetic random access memory with write and read circuits using magnetic tunnel junction (MTJ) devices wherein MTJs are arranged at cross points of word lines and read bit lines to form memory cells. After write bit lines and read bit lines are arranged parallel to each other, current bypass paths are formed allowing current to bypass the side and bottom of the MTJ. Thus, an electric field having intensity enough to change the magnetization direction of the MTJ, is applied only to each selected cell. In a write operation, the magnetization direction of a free layer in the MTJ is formed to be parallel or antiparallel to the magnetization direction of a pinned ferromagnetic layer by the current passing through the word line and the current bypass path.

Abstract: A method of manufacturing a ferroelectric memory of MFS- or MFIS-type includes the steps of forming on a substrate an insulating layer for preventing reaction at an interface between a ferroelectric material and a silicon substrate, forming a ferroelectric layer on the insulating layer, reacting a material of the insulating layer with a material of the ferroelectric layer, to transform the insulating layer into part of the ferroelectric layer, and forming an electrode on the ferroelectric layer. Since the insulating layer is formed between a substrate and a ferroelectric material, undesirable reaction between the two substances is prevented. The insulating layer is completely absorbed into the ferroelectric layer due to diffusion during deposition of the ferroelectric layer, to form an MFS-type ferroelectric memory. When some of the insulating layer remains, the ferroelectric memory becomes an MFIS-type.

Abstract: A ferroelectric capacitor taking a multilayer structure wherein a conductive oxide layer which is formed between a metal electrode and a ferroelectric layer, capable of enhancing the fatigue behavior in addition to reducing the leakage current. The multilayer structure can be fabricated by depositing a silicon oxide (SiO.sub.2) layer, an adhesive layer, a bottom metal layer, a lower conductive oxide layer, a ferroelectric layer, an upper conductive oxide layer and a top metal electrode layer are deposited over a silicon substrate, in sequence.

Abstract: In a disk apparatus using a ferroelectric thin film coated on the surface of a disk as a recording medium, an electrode layer is formed on a substrate and the ferroelectric thin film is formed on the electrode layer, thereby forming a disk. A head is installed on an arm over the disk. The head has a reflector, and a microtip electrode, for creating or erasing polarization of the ferroelectric thin film. An optical system is provided over the head. The head moves towards or away from the disk depending on recorded information (polarization direction), and the movement is read by the optical system. Therefore, a low-priced disk apparatus, capable of freely recording and reproducing information semipermanently, is realized.

Abstract: An apparatus and method for maintaining non-volatility in a ferroelectric random access memory (FRAM), in which recorded information is maintained during a power failure, are provided. The apparatus for maintaining non-volatility includes a control portion for a writeback function, a power source voltage sensing portion for sensing a failure in the power source voltage and providing a power failure signal to the control portion such that the control portion completes a writeback cycle before power failure. The power source voltage sensing portion generates a control signal by sensing a failure in power source voltage, and provides a power failure signal to the control portion such that a writeback process is completed before power failure, thereby maintaining non-volatility in the memory device. That is, loss of non-volatility in the memory device occurring during a power failure can be prevented by increasing the reliability of products.

Abstract: A ferroelectric capacitor used as a memory cell in a ferroelectric random access memory (FRAM) is provided. The ferroelectric capacitor includes a substrate, an insulating layer formed on the substrate, a Rh lower electrode provided on the insulating layer, an adhesive layer between the insulating layer and the lower electrode, a ferroelectric layer provided on the lower electrode, and a Rh upper electrode provided on the ferroelectric layer. The Rh used as the electrode material is not affected by diffusion of Si due to its fine structure when compared to a Pt electrode, and has excellent electrical properties due to better electrical conductivity and good heat-transfer properties.

Abstract: PZT ferroelectric thin films for capacitors comprise a combination of a donor dopant and an acceptor dopant in a total amount of about 0.1 to 8 mole percent of PZT, or Sc alone in an amount of about 0.1 to 5 mole percent. Nb or Ta is employed as a donor dopant, while Sc, Mg or Zn can be used as an acceptor dopant. The presence of a single Sc acceptor dopant, or both an acceptor dopant and a donor dopant, results in increased endurance. Fatigue cycles are increased on the order of about 10.sup.5 relative to dopant-free films. Doping with a single Sc acceptor dopant, or both an acceptor dopant and a donor dopant, reduces coercive field, allowing PZT films to switch at relatively low voltages. PZT thin films of a pure perovskite phase are obtained in which a pyrochlore phase is completely excluded. Pt may be used as an electrode material. The leakage current of PZT films doped with both the acceptor and donor elements are similar to the leakage current level of pure PZT thin films.