Abstract: A novel compound for a capping layer, and an organic light-emitting device containing the same are disclosed.

Abstract: A junctionless semiconductor device having a buried gate, a module and system each having the same, and a method for forming the semiconductor device are disclosed. A source, a drain, and a body of a semiconductor device having a buried gate are doped with the same type of impurities, so that the junctionless semiconductor device does not include a PN junction between the source and the body or between the body and the drain. As a result, a leakage current caused by GIDL is reduced so that operation characteristics of the semiconductor device are improved and the size of a current-flowing region is increased, resulting in an increased operation current.

Abstract: A semiconductor device includes a plurality of first gate electrodes buried in a semiconductor substrate including an active region and a device isolation film, a plurality of junction regions including storage node junction regions and a bit line junction region disposed between the storage node junction regions, a plurality of storage node contact plugs respectively disposed over and coupled to the storage node junction regions, a plurality of storage nodes respectively disposed over and coupled to the storage node contact plugs, and a second gate electrode disposed over a sidewall of a corresponding one of the storage node contact plugs. A vertical transistor includes the second gate electrode and the corresponding storage node contact plug and stores charges leaked from a corresponding one of the storage nodes.

Abstract: A semiconductor device includes a plurality of first gate electrodes buried in a semiconductor substrate including an active region and a device isolation film, a plurality of junction regions including storage node junction regions and a bit line junction region disposed between the storage node junction regions, a plurality of storage node contact plugs respectively disposed over and coupled to the storage node junction regions, a plurality of storage nodes respectively disposed over and coupled to the storage node contact plugs, and a second gate electrode disposed over a sidewall of a corresponding one of the storage node contact plugs. A vertical transistor includes the second gate electrode and the corresponding storage node contact plug and stores charges leaked from a corresponding one of the storage nodes.

Abstract: A junctionless semiconductor device having a buried gate, a module and system each having the same, and a method for forming the semiconductor device are disclosed. A source, a drain, and a body of a semiconductor device having a buried gate are doped with the same type of impurities, so that the junctionless semiconductor device does not include a PN junction between the source and the body or between the body and the drain. As a result, a leakage current caused by GIDL is reduced so that operation characteristics of the semiconductor device are improved and the size of a current-flowing region is increased, resulting in an increased operation current.

Abstract: A junctionless semiconductor device having a buried gate, a module and system each having the same, and a method for forming the semiconductor device are disclosed. A source, a drain, and a body of a semiconductor device having a buried gate are doped with the same type of impurities, so that the junctionless semiconductor device does not include a PN junction between the source and the body or between the body and the drain. As a result, a leakage current caused by GIDL is reduced so that operation characteristics of the semiconductor device are improved and the size of a current-flowing region is increased, resulting in an increased operation current.

Abstract: A junctionless semiconductor device having a buried gate, a module and system each having the same, and a method for forming the semiconductor device are disclosed. A source, a drain, and a body of a semiconductor device having a buried gate are doped with the same type of impurities, so that the junctionless semiconductor device does not include a PN junction between the source and the body or between the body and the drain. As a result, a leakage current caused by GIDL is reduced so that operation characteristics of the semiconductor device are improved and the size of a current-flowing region is increased, resulting in an increased operation current.

Abstract: An image sensing apparatus, particularly, an apparatus for optically combining visible images with far-infrared images is provided in which performing a separate signal processing may not be needed. The image combining apparatus emits light that is sensed by an image sensor, and reflects the light toward the image sensor in response to far-infrared rays being sensed from an object, thereby converting far-infrared information into information that can be sensed by the image sensor.

Abstract: An image sensing apparatus, particularly, an apparatus for optically combining visible images with far-infrared images is provided in which performing a separate signal processing may not be needed. The image combining apparatus emits light that is sensed by an image sensor, and reflects the light toward the image sensor in response to far-infrared rays being sensed from an object, thereby converting far-infrared information into information that can be sensed by the image sensor.

Abstract: The present invention relates to a SON (Silicon-On-Nothing) MOSFET having a beam structure and an inverter using thereof and the method for fabricating thereof to increase the efficiency and performance of a MOSFET. A method for fabricating the SON MOSFET according to the present invention comprises the steps of (a) patterning a passivation layer on a substrate, (b) doping boron on the substrate, (c) removing the patterned passivation layer, (d) forming the beam structure on the substrate by anisotropical etching on the region not doped with boron of the substrate, (e) depositing an insulating material on the substrate having the beam structure, and (f) deposing an electrode material on the disposed insulating material.

Abstract: The present invention relates to a SON (Silicon-On-Nothing) MOSFET having a beam structure and an inverter using thereof and the method for fabricating thereof to increase the efficiency and performance of a MOSFET. A method for fabricating the SON MOSFET according to the present invention comprises the steps of (a) patterning a passivation layer on a substrate, (b) doping boron on the substrate, (c) removing the patterned passivation layer, (d) forming the beam structure on the substrate by anisotropical etching on the region not doped with boron of the substrate, (e) depositing a insulating material on the substrate having the beam structure, and (f) depositing an electrode material on the disposed insulating material.