Abstract: To program in a nonvolatile memory device including a cell region including first metal pads and a peripheral region including second metal pads and vertically connected to the cell region by the first metal pads and the second metal pads, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.

Abstract: Disclosed is a method of processing item sales information by an electronic apparatus including acquiring a purchase request including item information related to an item selected by a user and information related to a payment means, providing a purchase response including approval information corresponding to the purchase request before proceeding with payment through the payment means in response to the purchase request when the information related to the payment means satisfies a first condition, transmitting a release request for the item to a first server; and requesting payment for at least some of an amount corresponding to one or more purchase requests related to the payment means according to an arrival of settlement timing corresponding to the payment means.

Abstract: A semiconductor memory system comprising: a memory device including a plurality of data cells; a read/write circuit suitable for performing a write operation to a target data cell among the data cells; and a state transition recognition circuit suitable for detecting a state transition of the target data cell, and ending the write operation according to the detection result of the state transition of the target data cell.

Abstract: A semiconductor memory system comprising: a memory device including a plurality of data cells; a read/write circuit suitable for performing a write operation to a target data cell among the data cells; and a state transition recognition circuit suitable for detecting a state transition of the target data cell, and ending the write operation according to the detection result of the state transition of the target data cell.