Abstract: In one embodiment, efficient content-addressable memory entry integrity checking is performed that protects the accuracy of lookup operations. Single-bit position lookup operations are performed resulting in match vectors that include a match result for each of the content-addressable memory entries at the single-bit position. An error detection value is determined for the match vector, and compared to a predetermined detection code for the single-bit position to identify whether an error is detected in at least one of the content-addressable memory entries. In one embodiment, a particular cumulative entry error detection vector storing entry error detection information for each of the content-addressable memory entries is updated based on the match vector. The particular cumulative entry error detection vector is compared to a predetermined entry error detection vector to determine which, if any, of the content-addressable memory entries has an identifiable error, which is then corrected.

Abstract: In one embodiment, efficient content-addressable memory entry integrity checking is performed that protects the accuracy of lookup operations. Single-bit position lookup operations are performed resulting in match vectors that include a match result for each of the content-addressable memory entries at the single-bit position. An error detection value is determined for the match vector, and compared to a predetermined detection code for the single-bit position to identify whether an error is detected in at least one of the content-addressable memory entries. In one embodiment, a particular cumulative entry error detection vector storing entry error detection information for each of the content-addressable memory entries is updated based on the match vector. The particular cumulative entry error detection vector is compared to a predetermined entry error detection vector to determine which, if any, of the content-addressable memory entries has an identifiable error, which is then corrected.

Abstract: In one embodiment, error detection and correction is performed in a content-addressable memory using single-bit position lookup operations. A lookup operation is performed generating a resultant match vector reflective of matching a single-bit position within each of multiple content-addressable memory entries against a corresponding bit value at the single-bit position within a lookup word. The resultant match vector is processed to determine if there are any errors and typically which entries contain a wrong bit value. The correct match vector (e.g., having no errors) is determined from the correct stored matching values (e.g., those used to program the content-addressable memory entries) and the value at the single-bit position within the lookup word. One embodiment compares the correct and resultant match vectors, while one embodiment performs this comparison using an error-correcting code of the correct match vector.

Abstract: In one embodiment, error detection and correction is performed in a content-addressable memory using single-bit position lookup operations. A lookup operation is performed generating a resultant match vector reflective of matching a single-bit position within each of multiple content-addressable memory entries against a corresponding bit value at the single-bit position within a lookup word. The resultant match vector is processed to determine if there are any errors and typically which entries contain a wrong bit value. The correct match vector (e.g., having no errors) is determined from the correct stored matching values (e.g., those used to program the content-addressable memory entries) and the value at the single-bit position within the lookup word. One embodiment compares the correct and resultant match vectors, while one embodiment performs this comparison using an error-correcting code of the correct match vector.

Abstract: In one embodiment, multiple content-addressable memory entries are associated with each other to effectively form a batch content-addressable memory entry that spans multiple physical entries of the content-addressable memory device. To match against this content-addressable memory entry, multiple lookup operations are required—i.e., one lookup operation for each combined physical entry. Further, one embodiment provides that a batch content-addressable memory entry can span one, two, three, or more physical content-addressable memory entries, and batch content-addressable memory entries of varying sizes could be programmed into a single content-addressable memory device. Thus, a lookup operation might take two lookup iterations on the physical entries of the content-addressable memory device, with a next lookup operation taking a different number of lookup iterations (e.g., one, three or more).

Abstract: In one embodiment, multiple content-addressable memory entries are associated with each other to effectively form a batch content-addressable memory entry that spans multiple physical entries of the content-addressable memory device. To match against this content-addressable memory entry, multiple lookup operations are required—i.e., one lookup operation for each combined physical entry. Further, one embodiment provides that a batch content-addressable memory entry can span one, two, three, or more physical content-addressable memory entries, and batch content-addressable memory entries of varying sizes could be programmed into a single content-addressable memory device. Thus, a lookup operation might take two lookup iterations on the physical entries of the content-addressable memory device, with a next lookup operation taking a different number of lookup iterations (e.g., one, three or more).