Abstract: An apparatus includes a demapper to receive a number of bit streams received by multiple radio-frequency (RF) antennas. The demapper can compute a first reliability metric associated with a first stream and a second reliability metric associated with a second stream. A channel decoder processes the first and the second reliability metrics to recover decoded data. The demapper is a reduced complexity demapper and uses a symbol subset of the first stream to compute, by employing look-up tables, the second reliability metric for the second stream.

Abstract: An apparatus includes a demapper to receive a number of bit streams received by multiple radio-frequency (RF) antennas. The demapper can compute a first reliability metric associated with a first stream and a second reliability metric associated with a second stream. A channel decoder processes the first and the second reliability metrics to recover decoded data. The demapper is a reduced complexity demapper and uses a symbol subset of the first stream to compute, by employing look-up tables, the second reliability metric for the second stream.

Abstract: An apparatus includes a demapper to compute a reliability metric associated with a number of bit streams received by multiple radio-frequency (RF) antennas. The apparatus further includes a channel decoder in a feedback loop with the demapper to process the reliability metric and to provide a feedback signal to the demapper. The demapper is an iterative demapper and can use a symbol subset of at least a first stream of the plurality of bit streams and the feedback signal to compute the reliability metric for a second stream of the plurality of bit streams.

Abstract: A device includes circuitry configured to determine one or more signal processing capabilities of another device in communication with the device. The device configures a signal compression mode of the device to correspond to a first signal compression mode of a plurality signal compression modes based on the one or more signal processing capabilities of the other device. The device s configured to modify, in response to detecting variations in one or more network configuration properties or the one or more signal processing capabilities of the other device, the signal compression mode of the device.

Abstract: A transmitter may comprise a symbol mapper circuit and operate in at least two modes. In a first mode, the number of symbols output by the mapper circuit per orthogonal frequency division multiplexing (OFDM) symbol transmitted by said transmitter may be greater than the number of data-carrying subcarriers used to transmit the OFDM symbol. In a second mode, the number of symbols output by said mapper circuit per orthogonal frequency division multiplexing (OFDM) symbol transmitted by said transmitter is less than or equal to the number of data-carrying subcarriers used to transmit said OFDM symbol. The symbols output by the symbol mapper circuit may be N-QAM symbols. While the circuitry operates in the first mode, the symbols output by the mapper may be converted to physical subcarrier values via filtering and decimation prior to being input to an IFFT circuit.

Abstract: A receiver comprises a sequence estimation circuit and a soft-input-soft-output (SISO) decoder. The sequence estimation circuit comprises circuitry operable to generate first soft bit decisions for symbols of a received inter-symbol-correlated signal. The SISO decoder comprises circuitry operable to decode the first soft bit decisions to generate corrected soft bit decisions. The circuitry of the sequence estimation circuit is operable to generate, based on the corrected soft bit decisions, second soft bit decisions for the symbols of the received inter-symbol-correlated signal, which are improved/refined relative to the first soft bit decisions.

Abstract: A device includes circuitry configured to determine one or more signal processing capabilities of another device in communication with the device. The device configures a signal compression mode of the device to correspond to a first signal compression mode of a plurality signal compression modes based on the one or more signal processing capabilities of the other device. The device s configured to modify, in response to detecting variations in one or more network configuration properties or the one or more signal processing capabilities of the other device, the signal compression mode of the device.

Abstract: A transmitter comprises a symbol mapper operable to map a frame of bits to a frame of symbols, where the symbols correspond to a determined modulation scheme, and circuitry operable to convert the frame of symbols to a physical layer signal and transmit the physical layer signal onto a communication medium. The circuitry is operable to process the physical layer signal such that a first portion of the physical layer signal is a first type of signal (e.g., a linear signal and/or non-ISC signal) and a second portion of the physical layer signal is a second type of signal (e.g., nonlinear signal and/or ISC signal). The first portion of the physical layer signal may comprise a header, a preamble, and/or a payload of the frame. The second portion of the physical layer signal may comprise a header, a preamble, and/or a payload of the frame.

Abstract: An Apparatus for transmitting and receiving signals over residential electrical cables includes a processor, at least one transmitter and at least one receiver, both coupled with the processor. The apparatus coupled with an electrical cable includes at least one active wire, one neutral wire and one ground wire, the transmitter and the receiver each including a coupling circuit for coupling the apparatus to the residential electrical cables. The coupling circuit has a first transformer and a second transformer, the first transformer including a center tap, receive wire pairs and transmit wire pairs each being formed from at least two of the active wire, the neutral wire, the ground wire and the midpoint. The processor dynamically switches a coupling of the receiver and the transmitter respectively between the receive wire pairs and the transmit wire pairs.

Abstract: An electronic receiver may comprise nonlinear distortion modeling circuitry, interference estimation circuitry, and sequence estimation circuitry. The receiver may receive an orthogonal frequency division multiplexing (OFDM) symbol in the form of an electromagnetic signal. The nonlinear distortion modeling circuitry may generate a nonlinear distortion model that models nonlinear distortion introduced to the received electromagnetic signal en route to the sequence estimation circuitry. The interference estimation circuitry may estimate inter-subcarrier interference present in the received OFDM symbol based on the generated nonlinear distortion model. The estimating of the inter-subcarrier interference may comprise applying the nonlinear distortion model to one or more candidate vectors generated by the sequence estimation circuitry. The sequence estimation circuitry may sequentially process a plurality of received virtual subcarrier values of the OFDM symbol using the estimated inter-subcarrier interference.

Abstract: An electronic receiver comprises a nonlinear distortion modeling circuit and a nonlinear distortion compensation circuit. The nonlinear distortion modeling circuit is operable to determine a plurality of sets of nonlinear distortion model parameter values, where each of the sets of nonlinear distortion model parameter values representing nonlinear distortion experienced by signals received by the electronic receiver from a respective one a plurality of communication partners. The nonlinear distortion compensation circuit is operable to use the sets of nonlinear distortion model parameter values for processing of signals from the plurality of communication partners. Each of the sets of nonlinear distortion model parameter values may comprises a plurality of values corresponding to a plurality of signal powers. The sets of nonlinear distortion model parameters may be stored in a lookup table indexed by a signal strength parameter.

Abstract: A receiver is configured to receive a sample of an inter-symbol correlated (ISC) signal, the sample corresponding to a time instant when phase and/or amplitude of the ISC signal is a result of correlation among a plurality of symbols of a transmitted symbol sequence. The receiver may linearize the sample of the ISC signal. The receiver may calculate a residual signal value based on the linearized sample of the ISC signal. The receiver may generate an estimate of one or more of said plurality of symbols based on a slicing of the residual signal value. The linearization may comprise applying an estimate of an inverse of a non-linear model. The non-linear model may be a model of nonlinearity experienced by the ISC signal in a transmitter from which the ISC signal originated, in a channel through which the ISC signal passed en route to the receiver, and/or in a front-end of the receiver.

Abstract: A transmitter may comprise a symbol mapper circuit and operate in at least two modes. In a first mode, the number of symbols output by the mapper circuit per orthogonal frequency division multiplexing (OFDM) symbol transmitted by said transmitter may be greater than the number of data-carrying subcarriers used to transmit the OFDM symbol. In a second mode, the number of symbols output by said mapper circuit per orthogonal frequency division multiplexing (OFDM) symbol transmitted by said transmitter is less than or equal to the number of data-carrying subcarriers used to transmit said OFDM symbol. The symbols output by the symbol mapper circuit may be N-QAM symbols. While the circuitry operates in the first mode, the symbols output by the mapper may be converted to physical subcarrier values via filtering and decimation prior to being input to an IFFT circuit.

Abstract: A receiver may be operable to receive an inter-symbol correlated (ISC) signal, and generate a plurality of soft decisions as to information carried in the ISC signal. The soft decisions may be generated using a reduced-state sequence estimation (RSSE) process. The RSSE process may be such that the number of symbol survivors retained after each iteration of the RSSE process is less than the maximum likelihood state space. The plurality of soft decisions may comprise a plurality of log likelihood ratios (LLRs). Each of the plurality of LLRs may correspond to a respective one of a plurality of subwords of a forward error correction (FEC) codeword.

Abstract: An electronic receiver comprises a nonlinear distortion modeling circuit and a nonlinear distortion compensation circuit. The nonlinear distortion modeling circuit is operable to determine a plurality of sets of nonlinear distortion model parameter values, where each of the sets of nonlinear distortion model parameter values representing nonlinear distortion experienced by signals received by the electronic receiver from a respective one a plurality of communication partners. The nonlinear distortion compensation circuit is operable to use the sets of nonlinear distortion model parameter values for processing of signals from the plurality of communication partners. Each of the sets of nonlinear distortion model parameter values may comprises a plurality of values corresponding to a plurality of signal powers. The sets of nonlinear distortion model parameters may be stored in a lookup table indexed by a signal strength parameter.

Abstract: An orthogonal frequency division multiple Access (OFDMA) receiver may comprise a forward error correction (FEC) decoder and nonlinearity compensation circuitry. The OFDMA receiver may be configured to receive a signal that is a result of multiple concurrent, partially synchronized transmissions from multiple transmitters using different subsets of subcarriers. The nonlinearity compensation circuit may be operable to generate estimates of constellation points transmitted on each of a plurality of the subcarriers of the received signal. The generation of the estimates may be based on soft decisions from the FEC decoder, and models of nonlinear distortion introduced by the multiple transmitters.

Abstract: A single-carrier receiver comprises a (FEC) decoder and a nonlinearity compensation circuit. The nonlinearity compensation circuit is operable to generate estimates of constellation points transmitted on a received signal based on soft decisions from the FEC decoder and based on a model of nonlinear distortion introduced by a transmitter from which the received signal was received. The generation of the estimates may be based on a measure of distance between a function of the received signal and a synthesized version of the received signal. The generation of the estimates may comprise iterative processing of symbols of the received signal, and the iterative processing may comprise a plurality of outer iterations and a plurality of inner iterations.

Abstract: An OFDM receiver comprises a (FEC) decoder and a nonlinearity compensation circuit. The nonlinearity compensation circuit is operable to generate estimates of constellation points transmitted on each of a plurality of subcarriers of a received signal based on soft decisions from the FEC decoder and based on a model of nonlinear distortion introduced by a transmitter from which the received signal was received. The generation of the estimates may be based on a measure of distance between a function of the received signal and a synthesized version of the received signal. The generation of the estimates may comprise iterative processing of symbols of the received signal, and the iterative processing may comprise a plurality of outer iterations and a plurality of inner iterations.

Abstract: An electronic receiver may comprise nonlinear distortion modeling circuitry, interference estimation circuitry, and sequence estimation circuitry. The receiver may receive an orthogonal frequency division multiplexing (OFDM) symbol in the form of an electromagnetic signal. The nonlinear distortion modeling circuitry may generate a nonlinear distortion model that models nonlinear distortion introduced to the received electromagnetic signal en route to the sequence estimation circuitry. The interference estimation circuitry may estimate inter-subcarrier interference present in the received OFDM symbol based on the generated nonlinear distortion model. The estimating of the inter-subcarrier interference may comprise applying the nonlinear distortion model to one or more candidate vectors generated by the sequence estimation circuitry. The sequence estimation circuitry may sequentially process a plurality of received virtual subcarrier values of the OFDM symbol using the estimated inter-subcarrier interference.

Abstract: A receiver comprises a sequence estimation circuit and a soft-input-soft-output (SISO) decoder. The sequence estimation circuit comprises circuitry operable to generate first soft bit decisions for symbols of a received inter-symbol-correlated signal. The SISO decoder comprises circuitry operable to decode the first soft bit decisions to generate corrected soft bit decisions. The circuitry of the sequence estimation circuit is operable to generate, based on the corrected soft bit decisions, second soft bit decisions for the symbols of the received inter-symbol-correlated signal, which are improved/refined relative to the first soft bit decisions.