Patents by Inventor Ilango S. Ganga

Ilango S. Ganga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150135177
    Abstract: A method and system may provide virtual port communications. A data frame, containing a destination identifier in a destination field and payload, may be modified by inserting a first virtual machine tag therein. The first virtual machine tag may include a first virtual port identifier for identifying a first logical interface of a first virtual machine on a virtual machine host.
    Type: Application
    Filed: June 30, 2014
    Publication date: May 14, 2015
    Inventor: Ilango S. Ganga
  • Publication number: 20140258813
    Abstract: One embodiment provides a method for resolving a forward error correction (FEC) protocol. The method includes requesting, by a network node element during an auto-negotiation period between the node element and a link partner, to resolve at least one FEC mode during a data mode period; wherein the auto-negotiation period and the data mode period are defined by an Ethernet communications protocol and the auto-negotiation period occurs before the data mode period; determining, by the network node element during the data mode period, at least one channel quality parameter of at least one channel of a communication link between the network node element and the link partner; and determining, by the network node element during the data mode period, whether to enable or disable at least one FEC mode for use by the network node element based on, at least in part, the at least one channel quality parameter.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 11, 2014
    Inventors: Kent C. Lusted, Ilango S. Ganga
  • Patent number: 8798056
    Abstract: A method and system may provide virtual port communications. A data frame, containing a destination identifier in a destination field and payload, may be modified by inserting a first virtual machine tag therein. The first virtual machine tag may include a first virtual port identifier for identifying a first logical interface of a first virtual machine on a virtual machine host.
    Type: Grant
    Filed: September 24, 2007
    Date of Patent: August 5, 2014
    Assignee: Intel Corporation
    Inventor: Ilango S Ganga
  • Publication number: 20140059225
    Abstract: Generally, this disclosure describes a network controller for remote system management. A host device may include the network controller and a programmable network element. The network controller may include controller circuitry configured to acquire network management data related to operation of the network controller and to receive host management data related to operation of the host device. The network controller may further include a transmitter configured to transmit the network and host management data to a management system remote from the network controller and a receiver configured to receive a command from the management system related to the management data, the command configured to reprogram the programmable network element to change a behavior of the programmable network element.
    Type: Application
    Filed: August 21, 2012
    Publication date: February 27, 2014
    Inventors: Iosif Gasparakis, Ilango S. Ganga, Peter P. Waskiewicz, JR.
  • Publication number: 20140059170
    Abstract: Examples are disclosed for a device having at least two media access controllers. In some examples, a first media access controller may be coupled to a host computing device. A second media access controller may be coupled to one or more processor circuits arranged to perform packet processing of data payloads for one or more data frames forwarded through the first media access controller and/or forwarded through the second media access controller. The first media access controller may be coupled to the second media access controller via a communication link. Other examples are described and claimed.
    Type: Application
    Filed: May 2, 2012
    Publication date: February 27, 2014
    Inventors: Iosif Gasparakis, Peter P. Waskiewicz, JR., Ilango S. Ganga, Terry V. Hulett, Parathasarathy Sarangam
  • Publication number: 20140019827
    Abstract: Techniques to perform forward error correction for an electrical backplane are described.
    Type: Application
    Filed: January 3, 2013
    Publication date: January 16, 2014
    Inventors: Ilango S. Ganga, Luke Chang, Andrey Belogolovy, Ovchinnikov Andrei
  • Publication number: 20130268619
    Abstract: An embodiment may include at least one server processor that may control, at least in part, server switch circuitry data and control plane processing. The at least one processor may include at least one cache memory that is capable of being involved in at least one data transfer that involves at least one component of the server. The at least one data transfer may be carried out in a manner that by-passes involvement of server system memory. The switch circuitry may be communicatively coupled to the at least one processor and to at least one node via communication links. The at least one processor may select, at least in part, at least one communication protocol to be used by the links. The switch circuitry may forward, at least in part, via at least one of the links at least one received packet. Many modifications are possible.
    Type: Application
    Filed: December 1, 2011
    Publication date: October 10, 2013
    Inventors: Anil Vasudevan, Parthasarathy Sarangam, Ilango S. Ganga
  • Patent number: 8370704
    Abstract: Techniques are described that can extend the transmission rate over cable. Multiple cables can be used to increase the transmission rate. The transmission standard applied for each cable can be an Ethernet backplane standard such as IEEE 802.3ap (2007). Data can be assigned to virtual lanes prior to transmission over a cable. Forward error correction may be applied to each virtual lane prior to transmission over cable. Forward error correction may be negotiated over a single virtual lane and then applied to all virtual lanes.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: February 5, 2013
    Assignee: Intel Corporation
    Inventors: Ilango S. Ganga, Richard I. Mellitz
  • Patent number: 8359408
    Abstract: In one embodiment, the present invention includes a method for reading configuration information from a multi-function device (MFD), building a dependency tree of a functional dependency of functions performed by the MFD based on the configuration information, which indicates that the MFD is capable of performing at least one function dependent upon another function, and loading software associated with the functions in order based at least in part on the indicated functional dependency. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: January 22, 2013
    Assignee: Intel Corporation
    Inventors: Ilango S. Ganga, Manoj K. Wadekar, Eric J. DeHaemer
  • Patent number: 8352828
    Abstract: Techniques to perform forward error correction for an electrical backplane are described. An apparatus may include a physical layer unit having a forward error correction sublayer to perform forward error correction.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: January 8, 2013
    Assignee: Intel Corporation
    Inventors: Ilango S. Ganga, Luke Chang, Andrey Belogolovy, Andrei Ovchinnikov
  • Publication number: 20120110421
    Abstract: Techniques to perform forward error correction for an electrical backplane are described. An apparatus may comprise a physical layer unit having a forward error correction sublayer to perform forward error correction using a single bit to represent a two bit synchronization header.
    Type: Application
    Filed: January 11, 2012
    Publication date: May 3, 2012
    Inventors: Ilango S. Ganga, Luke Chang, Andrey Belogolovy, Andrei Ovchinnikov
  • Patent number: 8108756
    Abstract: Techniques to perform forward error correction for an electrical backplane are described. An apparatus comprises a physical layer unit having a forward error correction sublayer to perform forward error correction using a single bit to represent a two bit synchronization header.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: January 31, 2012
    Assignee: Intel Corporation
    Inventors: Ilango S. Ganga, Luke Chang, Andrey Belogolovy, Andrei Ovchinnikov
  • Publication number: 20110138250
    Abstract: Techniques to perform forward error correction for an electrical backplane are described. An apparatus may comprise a physical layer unit having a forward error correction sublayer to perform forward error correction using a single bit to represent a two bit synchronization header.
    Type: Application
    Filed: December 9, 2010
    Publication date: June 9, 2011
    Inventors: Ilango S. Ganga, Luke Chang, Andrey Belogolovy, Andrei Ovchinnikov
  • Patent number: 7885321
    Abstract: Disclosed are a system, method and device for negotiating a data transmission mode over an attachment unit interface (DDI). A data transceiver circuit may be coupled to one or more data lanes of the DDI. A negotiation section may receive a link pulse signal on at least one data lane in the DDI during a negotiation period and selectively configure the data transceiver to transmit and receive data on one or more data lanes according to a data transmission mode based upon the received link pulse signal.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: February 8, 2011
    Assignee: Intel Corporation
    Inventors: Bradley J. Booth, Luke Chang, Ilango S. Ganga
  • Patent number: 7873892
    Abstract: Techniques to perform forward error correction for an electrical backplane are described. An apparatus comprises a physical layer unit having a forward error correction sublayer to perform forward error correction using a single bit to represent a two bit synchronization header.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: January 18, 2011
    Assignee: Intel Corporation
    Inventors: Ilango S. Ganga, Luke Chang, Andrey Belogolovy, Andrei Ovchinnikov
  • Publication number: 20100229067
    Abstract: Techniques are described that can extend the transmission rate over cable. Multiple cables can be used to increase the transmission rate. The transmission standard applied for each cable can be an Ethernet backplane standard such as IEEE 802.3ap (2007). Data can be assigned to virtual lanes prior to transmission over a cable. Forward error correction may be applied to each virtual lane prior to transmission over cable. Forward error correction may be negotiated over a single virtual lane and then applied to all virtual lanes.
    Type: Application
    Filed: March 9, 2009
    Publication date: September 9, 2010
    Inventors: Ilango S. Ganga, Richard I. Mellitz
  • Publication number: 20100189168
    Abstract: Disclosed are a system, method and device for negotiating a data transmission mode over an attachment unit interface (DDI). A data transceiver circuit may be coupled to one or more data lanes of the DDI. A negotiation section may receive a link pulse signal on at least one data lane in the DDI during a negotiation period and selectively configure the data transceiver to transmit and receive data on one or more data lanes according to a data transmission mode based upon the received link pulse signal.
    Type: Application
    Filed: April 1, 2010
    Publication date: July 29, 2010
    Inventors: Bradley J. Booth, Luke Chang, Ilango S. Ganga
  • Patent number: 7720135
    Abstract: Disclosed are a system, method and device for negotiating a data transmission mode over an attachment unit interface (DDI). A data transceiver circuit may be coupled to one or more data lanes of the DDI. A negotiation section may receive a link pulse signal on at least one data lane in the DDI during a negotiation period and selectively configure the data transceiver to transmit and receive data on one or more data lanes according to a data transmission mode based upon the received link pulse signal.
    Type: Grant
    Filed: March 15, 2004
    Date of Patent: May 18, 2010
    Assignee: Intel Corporation
    Inventors: Bradley J. Booth, Luke Chang, Ilango S. Ganga
  • Publication number: 20100095185
    Abstract: Techniques to perform forward error correction for an electrical backplane are described. An apparatus may comprise a physical layer unit having a forward error correction sublayer to perform forward error correction using a single bit to represent a two bit synchronization header. Other embodiments are described and claimed.
    Type: Application
    Filed: December 16, 2009
    Publication date: April 15, 2010
    Inventors: Ilango S. Ganga, Luke Chang, Andrey Belogolovy, Andrei Ovchinnikov
  • Patent number: 7676733
    Abstract: Techniques to perform forward error correction for an electrical backplane are described. An apparatus comprises a physical layer unit having a forward error correction sublayer to perform forward error correction using a single bit to represent a two bit synchronization header.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: March 9, 2010
    Assignee: Intel Corporation
    Inventors: Ilango S. Ganga, Luke Chang, Andrey Belogolovy, Andrei Ovchinnikov