Patents by Inventor Ilaria Motta
Ilaria Motta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8700978Abstract: Subject matter disclosed herein relates to semiconductor memories and, more particularly, to multilevel non-volatile or volatile memories.Type: GrantFiled: February 25, 2013Date of Patent: April 15, 2014Assignee: Micron Technology, Inc.Inventors: Guido Lomazzi, Ilaria Motta, Marco Maccarrone
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Publication number: 20130242652Abstract: Subject matter disclosed herein relates to semiconductor memories and, more particularly, to multilevel non-volatile or volatile memories.Type: ApplicationFiled: February 25, 2013Publication date: September 19, 2013Applicant: MICRON TECHNOLOGY, INC.Inventors: Marco Maccarrone, Guido Lomazzi, Ilaria Motta
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Patent number: 8386895Abstract: Subject matter disclosed herein relates to semiconductor memories and, more particularly, to multilevel non-volatile or volatile memories.Type: GrantFiled: May 19, 2010Date of Patent: February 26, 2013Assignee: Micron Technology, Inc.Inventors: Marco Maccarrone, Guido Lomazzi, Ilaria Motta
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Publication number: 20110289376Abstract: Subject matter disclosed herein relates to semiconductor memories and, more particularly, to multilevel non-volatile or volatile memories.Type: ApplicationFiled: May 19, 2010Publication date: November 24, 2011Inventors: Marco Maccarrone, Guido Lomazzi, Ilaria Motta
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Patent number: 7394694Abstract: A NAND flash memory device includes a matrix of memory cells each having a threshold voltage. The matrix includes an individually erasable sector and is arranged in plural rows and columns with the cells of each column arranged in plural strings of cells connected in series. The memory device includes logic that erases the cells of a selected sector, and restoring logic that restores the threshold voltage of the erased cells. The restoring logic acts in succession on each of plural blocks of the sector, each block including groups of one or more cells. The restoring logic reads each group with respect to a limit value exceeding a reading reference value, programs only each group wherein the threshold voltage of at least one cell does not reach the limit value, and stops the restoring in response to reaching the limit value by at least one set of the groups.Type: GrantFiled: May 31, 2006Date of Patent: July 1, 2008Assignee: STMicroelectronics S.r.l.Inventors: Rino Micheloni, Roberto Ravasio, Ilaria Motta
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Nonvolatile memory device having a voltage booster with a discharge circuit activated during standby
Patent number: 6836442Abstract: A voltage booster device to selectively assume an active status and a stand-by status with a first terminal to assume a respective electric potential and associated to a first capacitor, a second terminal associated to a second capacitor and selectively connectable to the first terminal, and a discharge circuit for discharging the first capacitor thus reducing the electrical potential of the first terminal, the discharge circuit being activated when said device is in the stand-by status and the second terminal is disconnected from said first terminal.Type: GrantFiled: July 7, 2003Date of Patent: December 28, 2004Assignee: STMicroelectronics S.r.l.Inventors: Rino Micheloni, Ilaria Motta, Marco Capovilla -
Patent number: 6822905Abstract: A method and a circuit are for regulating the source terminal voltage of a non-volatile memory cell during the cell programming and/or reading phases. The method includes a phase of locally regulating the voltage value and includes comparing the source current of the cell array with a reference current. A fraction of the source current is converted to a voltage and compared with a voltage generated from a memory cell acting as a reference and being programmed to the distribution with the highest current levels. The comparison may be used for controlling a current generator to inject, into the source terminal, the current necessary to keep the predetermined voltage thereof at a constant value.Type: GrantFiled: December 27, 2002Date of Patent: November 23, 2004Assignee: STMicroelectronics S.r.l.Inventors: Rino Micheloni, Ilaria Motta
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Patent number: 6809961Abstract: A method and program-load circuit is for regulating the voltages at the drain and body terminals of a non-volatile memory cell being programmed. These voltages are applied from a program-load circuit connected in a conduction pattern to transfer a predetermined voltage value to at least one terminal of the memory cell. The method includes a step of regulating the voltage value locally, within the program-load circuit, to overcome the effect of a parasitic resistor present in the conduction pattern.Type: GrantFiled: December 27, 2002Date of Patent: October 26, 2004Assignee: STMicroelectronics S.r.l.Inventors: Rino Micheloni, Sabina Mognoni, Ilaria Motta, Andrea Sacco
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Publication number: 20040136242Abstract: Voltage booster device (3) such as to selectively assume an active status and a stand-by status, said device comprising:Type: ApplicationFiled: July 7, 2003Publication date: July 15, 2004Applicant: STMicroelectronics S.r.I.Inventors: Rino Micheloni, Ilaria Motta, Marco Capovilla
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Publication number: 20030151949Abstract: A method and program-load circuit is for regulating the voltages at the drain and body terminals of a non-volatile memory cell being programmed. These voltages are applied from a program-load circuit connected in a conduction pattern to transfer a predetermined voltage value to at least one terminal of the memory cell. The method includes a step of regulating the voltage value locally, within the program-load circuit, to overcome the effect of a parasitic resistor present in the conduction pattern.Type: ApplicationFiled: December 27, 2002Publication date: August 14, 2003Applicant: STMicroelectronics S.r.I.Inventors: Rino Micheloni, Sabina Mognoni, Ilaria Motta, Andrea Sacco
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Publication number: 20030142547Abstract: A method and a circuit are for regulating the source terminal voltage of a non-volatile memory cell during the cell programming and/or reading phases. The method includes a phase of locally regulating the voltage value and includes comparing the source current of the cell array with a reference current. A fraction of the source current is converted to a voltage and compared with a voltage generated from a memory cell acting as a reference and being programmed to the distribution with the highest current levels. The comparison may be used for controlling a current generator to inject, into the source terminal, the current necessary to keep the predetermined voltage thereof at a constant value.Type: ApplicationFiled: December 27, 2002Publication date: July 31, 2003Applicant: STMicroelectronics S.r.I.Inventors: Rino Micheloni, Ilaria Motta
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Patent number: 6559627Abstract: A voltage regulator having a comparator with an output terminal that is the output of the regulator, terminals for connection to a voltage supply, a source of a reference voltage connected to an input terminal of the comparator, and a feedback circuit connected between the output terminal and the other input terminal of the comparator. To prevent transients upon the transition from the standby state to the active state, there is provided a second reference-voltage source that provides a reference voltage substantially equal to that of the first source, a switch for connecting the second source to the other input terminal of the comparator, and a control circuit that can activate the supply of the regulator and can close the switch for a predetermined period of time when the supply of the regulator is activated.Type: GrantFiled: November 7, 2001Date of Patent: May 6, 2003Assignee: STMicroelectronics S.r.l.Inventors: Osama Khouri, Ilaria Motta, Rino Micheloni, Guido Torelli
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Patent number: 6437636Abstract: A voltage boost device includes a first boost stage and a second boost stage connected to an input terminal and to an output terminal, the output terminal supplying an output voltage higher than a supply voltage. The input terminal receives an operating condition signal having a first logic level representative of a standby operating state and a second logic level representative of an active operation state. The first boost stage is enabled in presence of the second logic level of the operating condition signal, and is disabled in presence of the first logic level of the operating condition signal; the second boost stage is controlled in a first operating condition in presence of the first logic level of the operating condition signal, and is controlled in a second operating condition in presence of the second logic level of the operating condition signal.Type: GrantFiled: December 22, 2000Date of Patent: August 20, 2002Assignee: STMicroelectronics S.r.l.Inventors: Matteo Zammattio, Ilaria Motta, Rino Micheloni, Carla Golla
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Publication number: 20020089317Abstract: A voltage regulator having a comparator with an output terminal that is the output of the regulator, terminals for connection to a voltage supply, a source of a reference voltage connected to an input terminal of the comparator, and a feedback circuit connected between the output terminal and the other input terminal of the comparator. To prevent transients upon the transition from the standby state to the active state, there is provided a second reference-voltage source that provides a reference voltage substantially equal to that of the first source, a switch for connecting the second source to the other input terminal of the comparator, and a control circuit that can activate the supply of the regulator and can close the switch for a predetermined period of time when the supply of the regulator is activated.Type: ApplicationFiled: November 7, 2001Publication date: July 11, 2002Applicant: STMicroelectronics S.r.I.Inventors: Osama Khouri, Ilaria Motta, Rino Micheloni, Guido Torelli
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Publication number: 20010017797Abstract: A voltage boost device includes a first boost stage and a second boost stage connected to an input terminal and to an output terminal, the output terminal supplying an output voltage higher than a supply voltage. The input terminal receives an operating condition signal having a first logic level representative of a standby operating state and a second logic level representative of an active operation state. The first boost stage is enabled in presence of the second logic level of the operating condition signal, and is disabled in presence of the first logic level of the operating condition signal; the second boost stage is controlled in a first operating condition in presence of the first logic level of the operating condition signal, and is controlled in a second operating condition in presence of the second logic level of the operating condition signal.Type: ApplicationFiled: December 22, 2000Publication date: August 30, 2001Inventors: Matteo Zammattio, Ilaria Motta, Rino Micheloni, Carla Golla
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Patent number: 6259632Abstract: Circuit for the regulation of the word line voltage in a memory, including a voltage regulator suitable to generate an output regulated voltage to be supplied to one or more word lines of the memory when said one or more word lines are being selected, and charge accumulation means that are selectively connectable with the output of the voltage regulator and suitable to accumulate a compensation charge for a voltage drop that takes place on said regulated voltage upon the selection of said one or more word lines of the memory.Type: GrantFiled: January 19, 2000Date of Patent: July 10, 2001Assignee: STMicroelectronics S.r.l.Inventors: Osama Khouri, Rino Micheloni, Ilaria Motta, Andrea Sacco, Guido Torelli
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Patent number: 6259635Abstract: A circuit for the regulation of the word line voltage in a memory, comprising a voltage regulator suitable to generate an output regulated voltage to be supplied to one or more word lines of the memory when the one or more word lines are being selected. The circuit includes a voltage boosting circuit that is coupled to the output of said voltage regulator and that can be activated upon the selection of one or more memory word lines in order to boost the regulated voltage upon the selection of the one or more memory word lines.Type: GrantFiled: January 19, 2000Date of Patent: July 10, 2001Assignee: STMicroelectronics S.r.l.Inventors: Osama Khouri, Rino Micheloni, Ilaria Motta, Andrea Sacco, Guido Torelli
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Patent number: 6249112Abstract: Presented is a voltage regulating circuit for a capacitive load, which is connected between first and second terminals of a supply voltage generator. The regulating circuit has an input terminal and an output terminal, and includes an operational amplifier having an inverting input terminal connected to the input terminal of the regulating circuit and a non-inverting input terminal connected to an intermediate node of a voltage divider. The voltage divider is connected between an output node, which is connected to the output terminal of the regulating circuit, and the second terminal of the supply voltage generator. The operational amplifier has an output terminal connected, for driving a first field-effect transistor, between the output node and the first terminal of the supply voltage generator. The output terminal of the operational amplifier is also connected to the output node through a compensation network.Type: GrantFiled: June 29, 2000Date of Patent: June 19, 2001Assignee: STMicroelectronics S.r.l.Inventors: Osama Khouri, Rino Micheloni, Ilaria Motta, Guido Torelli