Patents by Inventor Ilhyun Kim
Ilhyun Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12265823Abstract: Disclosed techniques relate to trace caches. Trace cache circuitry may identify traces that satisfy one or more criteria. Generally, internal branches of a trace should satisfy a threshold bias level in a particular direction. To achieve this goal, the processor may initially assume that branches meet the threshold, track their usefulness in the trace context over time, and prevent inclusion of branches that fall below a usefulness threshold (which indicates that those branches are not sufficiently biased). Branches that do not meet the threshold may be added to a Bloom filter, for example. Usefulness may be tracked during trace training, when valid in a trace cache, or both.Type: GrantFiled: July 14, 2023Date of Patent: April 1, 2025Assignee: Apple Inc.Inventors: Ilhyun Kim, Niket K. Choudhary, Muawya M. Al-Otoom, Pruthivi Vuyyuru, Ronald P. Hall
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Patent number: 12256036Abstract: A mobile terminal comprises: a body frame that is expandable in a first direction and shrinkable in a second direction; a flexible display in which the area of a display unit positioned on the front surface of the body frame is expanded according to the expansion of the body frame; a driving unit that changes the size of the body; a sensing unit that senses a user command; and a control unit that controls the driving unit to expand or shrink the body frame on the basis of the user command sensed by the sensing unit. Thus, a screen of the display unit positioned on the front surface can be expanded through size adjustment. Because a part of the screen always faces the outside, a separate secondary display unit is not required, and the screen may be expanded step by step as needed.Type: GrantFiled: December 18, 2019Date of Patent: March 18, 2025Assignee: LG ELECTRONICS INC.Inventors: Ilhyun Kim, Changhwan Choi
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Publication number: 20250021333Abstract: Disclosed techniques relate to trace caches. Trace cache circuitry may identify traces that satisfy one or more criteria. Generally, internal branches of a trace should satisfy a threshold bias level in a particular direction. To achieve this goal, the processor may initially assume that branches meet the threshold, track their usefulness in the trace context over time, and prevent inclusion of branches that fall below a usefulness threshold (which indicates that those branches are not sufficiently biased). Branches that do not meet the threshold may be added to a Bloom filter, for example. Usefulness may be tracked during trace training, when valid in a trace cache, or both.Type: ApplicationFiled: July 14, 2023Publication date: January 16, 2025Inventors: Ilhyun Kim, Niket K. Choudhary, Muawya M. Al-Otoom, Pruthivi Vuyyuru, Ronald P. Hall
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Publication number: 20250021332Abstract: Disclosed techniques relate to trace cache circuitry configured to identify and cache traces that satisfy certain criteria. Prediction circuitry may track directions of executed control transfer instructions, including a first category of control transfer instructions that meet a first threshold bias level toward a given direction (which may be referred to as “stable”) and a second category of control transfer instructions that do not meet the first threshold bias level (which may be referred to as “unstable”). Trace cache circuitry may identify traces of instructions that satisfy a set of criteria, including: only control transfer instructions of the first category are allowed as internal control transfer instructions and a control transfer instruction in the second category is allowed only at an end of a given trace. Disclosed techniques may advantageously provide performance and power advantages of trace caching with reduced complexity, relative to certain traditional trace caches.Type: ApplicationFiled: July 14, 2023Publication date: January 16, 2025Inventors: Niket K. Choudhary, Muawya M. Al-Otoom, Pruthivi Vuyyuru, Andrew H. Lin, Ilhyun Kim, Douglas C. Holman, Samir Dutt, Ronald P. Hall
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Publication number: 20240028339Abstract: An apparatus includes an instruction cache circuit and an instruction fetch circuit. The instruction fetch circuit is configured to retrieve, from the instruction cache circuit, a fetch group that includes a plurality of instructions for execution by a processing circuit, and to make a determination that the fetch group includes a control transfer instruction that is predicted to be taken. A target address associated with the control transfer instruction is directed to an instruction within the fetch group. The instruction fetch circuit is further configured to, based on the determination, alter instructions within the fetch group in a manner that is based on a type of the control transfer instruction.Type: ApplicationFiled: July 25, 2022Publication date: January 25, 2024Inventors: Niket K. Choudhary, Mary D. Brown, Ethan R. Schuchman, Ronald P. Hall, Ian D. Kountanis, Douglas C. Holman, Ilhyun Kim, Abhishek Kumar, Siavash Zangeneh Kamali
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Publication number: 20230007118Abstract: A mobile terminal comprises: a body frame that is expandable in a first direction and shrinkable in a second direction; a flexible display in which the area of a display unit positioned on the front surface of the body frame is expanded according to the expansion of the body frame; a driving unit that changes the size of the body; a sensing unit that senses a user command; and a control unit that controls the driving unit to expand or shrink the body frame on the basis of the user command sensed by the sensing unit. Thus, a screen of the display unit positioned on the front surface can be expanded through size adjustment. Because a part of the screen always faces the outside, a separate secondary display unit is not required, and the screen may be expanded step by step as needed.Type: ApplicationFiled: December 18, 2019Publication date: January 5, 2023Applicant: LG ELECTRONICS INC.Inventors: Ilhyun KIM, Changhwan CHOI
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Patent number: 10453637Abstract: A direct-current (DC) air circuit breaker for opening and closing a circuit according to various embodiments includes a circuit unit having a main circuit, a detecting unit having a detection circuit for detecting a fault current in the main circuit, and a circuit operating device configured to allow connection or isolation between the main circuit and the detection circuit.Type: GrantFiled: June 13, 2018Date of Patent: October 22, 2019Assignee: LSIS CO., LTD.Inventors: Seungpil Yang, Sangchul Lee, Youngkook Kim, Ilhyun Kim
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Patent number: 10409611Abstract: An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software.Type: GrantFiled: December 26, 2015Date of Patent: September 10, 2019Assignee: Intel CorporationInventors: Martin G. Dixon, Ravi Rajwar, Konrad K. Lai, Robert S. Chappell, Rajesh S. Parthasarathy, Alexandre J. Farcy, Ilhyun Kim, Prakash Math, Matthew Merten, Vijaykumar Kadgi
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Patent number: 10409612Abstract: An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software.Type: GrantFiled: December 26, 2015Date of Patent: September 10, 2019Assignee: Intel CorporationInventors: Martin G. Dixon, Ravi Rajwar, Konrad K. Lai, Robert S. Chappell, Rajesh S. Parthasarathy, Alexandre J. Farcy, Ilhyun Kim, Prakash Math, Matthew Merten, Vijaykumar Kadgi
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Publication number: 20190035588Abstract: A direct-current (DC) air circuit breaker for opening and closing a circuit according to various embodiments includes a circuit unit having a main circuit, a detecting unit having a detection circuit for detecting a fault current in the main circuit, and a circuit operating device configured to allow connection or isolation between the main circuit and the detection circuit.Type: ApplicationFiled: June 13, 2018Publication date: January 31, 2019Inventors: Seungpil YANG, Sangchul LEE, Youngkook KIM, Ilhyun KIM
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Publication number: 20170161106Abstract: A method and apparatus for providing fairness in a multi-processing element environment is herein described. Mask elements are utilized to associated portions of a reservation station with each processing element, while still allowing common access to another portion of reservation station entries. Additionally, bias logic biases selection of processing elements in a pipeline away from a processing element associated with a blocking stall to provide fair utilization of the pipeline.Type: ApplicationFiled: December 20, 2016Publication date: June 8, 2017Inventors: Morris Marden, Matthew Merten, Alexandre Farcy, Avinash Sodani, James Hadley, Ilhyun Kim
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Patent number: 9524191Abstract: A method and apparatus for providing fairness in a multi-processing element environment is herein described. Mask elements are utilized to associated portions of a reservation station with each processing element, while still allowing common access to another portion of reservation station entries. Additionally, bias logic biases selection of processing elements in a pipeline away from a processing element associated with a blocking stall to provide fair utilization of the pipeline.Type: GrantFiled: November 8, 2010Date of Patent: December 20, 2016Assignee: Intel CorporationInventors: Morris Marden, Matthew Merten, Alexandre Farcy, Avinash Sodani, James Hadley, Ilhyun Kim
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Patent number: 9521241Abstract: A mobile terminal including a terminal body; a display unit configured to switch between an activated state in which lighting is turned on and a deactivated state in which lighting is turned off; and a controller configured to sense a plurality of touch inputs applied to the display unit when the display unit is deactivated, release a locked state of the terminal, when the sensed touch inputs are matched to a pre-set pattern, switch the deactivated display unit to an activated state, and selectively display on the activated display unit at least one execution screen based on characteristics of the sensed touch inputs among a plurality of pre-set execution screens.Type: GrantFiled: September 3, 2014Date of Patent: December 13, 2016Assignee: LG ELECTRONICS INC.Inventors: Soyeon Yim, Jonghoon Kim, Jinhae Choi, Ilhyun Kim, Bonjoon Koo, Youngjoon Kim
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Publication number: 20160246606Abstract: An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software.Type: ApplicationFiled: December 26, 2015Publication date: August 25, 2016Inventors: Martin G. Dixon, Ravi Rajwar, Konrad K. Lai, Robert S. Chappell, Rajesh S. Parthasarathy, Alexandre J. Farcy, Ilhyun Kim, Prakash Math, Matthew Merten, Vijakumar Kadgi
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Publication number: 20160239304Abstract: An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software.Type: ApplicationFiled: December 26, 2015Publication date: August 18, 2016Inventors: Martin G. Dixon, Ravi Rajwar, Konrad K. Lai, Robert S. Chappell, Rajesh S. Parthasarathy, Alexandre J. Farcy, Ilhyun Kim, Prakash Math, Matthew Merten, Vijaykumar Kadgi
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Publication number: 20160210177Abstract: An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software.Type: ApplicationFiled: December 26, 2015Publication date: July 21, 2016Inventors: Martin G. Dixon, Ravi Rajwar, Konrad K. Lai, Robert S. Chappell, Rajesh S. Parthasarathy, Alexandre J. Farcy, Ilhyun Kim, Prakash Math, Matthew Merten, Vijaykumar Kadgi
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Publication number: 20160154648Abstract: An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software.Type: ApplicationFiled: December 26, 2015Publication date: June 2, 2016Inventors: Martin G. Dixon, Ravi Rajwar, Konrad K. Lai, Robert S. Chappell, Rajesh S. Parthasarathy, Alexandre J. Farcy, Ilhyun Kim, Prakash Math, Matthew Merten, Vijaykumar Kadgi
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Patent number: 9348591Abstract: This disclosure includes tracking of in-use states of cache lines to improve throughput of pipelines and thus increase performance of processors. Access data for a number of sets of instructions stored in an instruction cache may be tracked using an in-use array in a first array until the data for one or more of those sets reach a threshold condition. A second array may then be used as the in-use array to track the sets of instructions after a micro-operation is inserted into the pipeline. When the micro-operation retires from the pipeline, the first array may be cleared. The process may repeat after the second array reaches the threshold condition. During the tracking, an in-use state for an instruction line may be detected by inspecting a corresponding bit in each of the arrays. Additional arrays may also be used to track the in-use state.Type: GrantFiled: December 29, 2011Date of Patent: May 24, 2016Assignee: Intel CorporationInventors: Ilhyun Kim, Chen Koren, Alexandre J. Farcy, Robert L. Hinton, Choon Wei Khor, Lihu Rappoport
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Publication number: 20160132336Abstract: An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software.Type: ApplicationFiled: December 26, 2015Publication date: May 12, 2016Inventors: Martin G. Dixon, Ravi Rajwar, Konrad K. Lai, Robert S. Chappell, Rajesh S. Parthasarathy, Alexandre J. Farcy, Ilhyun Kim, Prakash Math, Matthew Merten, Vijaykumar Kadgi
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Publication number: 20160132334Abstract: An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software.Type: ApplicationFiled: December 26, 2015Publication date: May 12, 2016Inventors: Martin G. Dixon, Ravi Rajwar, Konrad K. Lai, Robert S. Chappell, Rajesh S. Parthasarathy, Alexandre J. Farcy, Ilhyun Kim, Prakash Math, Matthew Merten, Vijaykumar Kadgi