Patents by Inventor Ilias VOUGIOUKAS

Ilias VOUGIOUKAS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240345962
    Abstract: There is provided address translation circuitry and a method for performing address translation. The address translation circuitry is responsive to receipt of a first address to perform an address translation between the first address and a second address by performing a predetermined maximum number of sequential lookups. The address translation circuitry is configured to support regular page tables comprising 2N entries and large page tables comprising 2N*M entries.
    Type: Application
    Filed: July 21, 2022
    Publication date: October 17, 2024
    Applicant: Arm Limited
    Inventors: Andreas Lars Sandberg, Ilias Vougioukas
  • Publication number: 20230342150
    Abstract: Apparatuses and methods for branch prediction are provided. Branch prediction circuitry generates prediction with respect to branch instructions of whether those branches will be taken or not-taken. Hypervector generation circuitry assigns an arbitrary hypervector in deterministic dependence on an address of each branch instruction, wherein the hypervectors comprises at least 500 bits. Upon the resolution of a branch a corresponding hypervector is added to a stored taken hypervector or a stored not-taken hypervector in dependence on the resolution of the branch. The branch prediction circuitry generates a prediction for a branch instructions in dependence on a mathematical distance metric of a hypervector generated for that branch instruction from the stored taken hypervector or the not-taken hypervector.
    Type: Application
    Filed: November 26, 2020
    Publication date: October 26, 2023
    Inventors: Ilias VOUGIOUKAS, Andreas Lars SANDBERG, Nikos NIKOLERIS
  • Patent number: 11657003
    Abstract: Apparatus comprises two or more processing devices each having an associated translation lookaside buffer to store translation data defining address translations between virtual and physical memory addresses, each address translation being associated with a respective virtual address space; and control circuitry to control the transfer of at least a subset of the translation data from the translation lookaside buffer associated with a first processing device to the translation lookaside buffer associated with a second, different, processing device.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: May 23, 2023
    Assignee: Arm Limited
    Inventors: Ilias Vougioukas, Nikos Nikoleris, Andreas Lars Sandberg, Stephan Diestelhorst
  • Patent number: 10838730
    Abstract: A branch predictor is provided with a branch state buffer, branch prediction save circuitry responsive to a branch prediction save event associated with a given execution context to save at least a portion of the active branch prediction state associated with the given execution context to a branch state buffer; and branch prediction restore circuitry responsive to a branch prediction restore event associated with the given execution context to restore active branch prediction state based on previously saved branch prediction state stored in the branch state buffer for the given execution context. This is useful for reducing the performance impact of mitigating against speculative side-channel attacks.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: November 17, 2020
    Assignee: Arm Limited
    Inventors: Ilias Vougioukas, Andreas Lars Sandberg, Stephan Diestelhorst, Matthew James Horsnell
  • Publication number: 20200293457
    Abstract: Apparatus comprises two or more processing devices each having an associated translation lookaside buffer to store translation data defining address translations between virtual and physical memory addresses, each address translation being associated with a respective virtual address space; and control circuitry to control the transfer of at least a subset of the translation data from the translation lookaside buffer associated with a first processing device to the translation lookaside buffer associated with a second, different, processing device.
    Type: Application
    Filed: January 31, 2020
    Publication date: September 17, 2020
    Inventors: Ilias VOUGIOUKAS, Nikos NIKOLERIS, Andreas Lars SANDBERG, Stephan DIESTELHORST
  • Patent number: 10705848
    Abstract: A TAGE branch predictor has, as its fallback predictor, a perceptron predictor. This provides a branch predictor which reduces the penalty of context switches and branch prediction state flushes.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: July 7, 2020
    Assignee: Arm Limited
    Inventors: Ilias Vougioukas, Stephan Diestelhorst, Andreas Lars Sandberg, Nikos Nikoleris
  • Publication number: 20190361707
    Abstract: A TAGE branch predictor has, as its fallback predictor, a perceptron predictor. This provides a branch predictor which reduces the penalty of context switches and branch prediction state flushes.
    Type: Application
    Filed: June 26, 2018
    Publication date: November 28, 2019
    Inventors: Ilias VOUGIOUKAS, Stephan DIESTELHORST, Andreas Lars SANDBERG, Nikos NIKOLERIS
  • Publication number: 20190361706
    Abstract: A branch predictor is provided with a branch state buffer, branch prediction save circuitry responsive to a branch prediction save event associated with a given execution context to save at least a portion of the active branch prediction state associated with the given execution context to a branch state buffer; and branch prediction restore circuitry responsive to a branch prediction restore event associated with the given execution context to restore active branch prediction state based on previously saved branch prediction state stored in the branch state buffer for the given execution context. This is useful for reducing the performance impact of mitigating against speculative side-channel attacks.
    Type: Application
    Filed: June 26, 2018
    Publication date: November 28, 2019
    Inventors: Ilias VOUGIOUKAS, Andreas Lars SANDBERG, Stephan DIESTELHORST, Matthew James HORSNELL