Patents by Inventor Ilija Materic

Ilija Materic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multimode filter for de-blocking and de-ringing
    Patent number: 8369420
    Abstract: A multimode filter that is versatile for digital signal processing including in-loop processing (de-blocking and de-ringing), post processing (de-blocking and de-ringing), and overlap smoothing. A flexi-standard filter includes the multimode filter. An electronic device includes the flexi-standard filter. A process for digital signal processing includes in-loop processing (de-blocking and de-ringing), post processing (de-blocking and de-ringing), and overlap smoothing.
    Type: Grant
    Filed: August 22, 2007
    Date of Patent: February 5, 2013
    Assignee: STMicroelectronics Asia Pacific Pte, Ltd.
    Inventors: Patricia Chiang, Ilija Materic, Martin Bolton, Nicolas Pellerin
  • Multimode filter for de-blocking and de-ringing
    Publication number: 20080056389
    Abstract: A multimode filter that is versatile for digital signal processing including in-loop processing (de-blocking and de-ringing), post processing (de-blocking and de-ringing), and overlap smoothing. The present disclosure further discloses a flexi-standard filter comprising the multimode filter. The present disclosure also discloses an electronic device comprising the flexi-standard filter. The present disclosure finally discloses a process for digital signal processing that includes in-loop processing (de-blocking and de-ringing), post processing (de-blocking and de-ringing), and overlap smoothing.
    Type: Application
    Filed: August 22, 2007
    Publication date: March 6, 2008
    Applicant: STMicroelectronics Asia Pacific PTE LTD
    Inventors: Patricia Chiang, Ilija Materic, Martin Bolton, Nicolas Pellerin
  • Method and device for detecting the parity of successive fields of an interlaced video signal
    Patent number: 7023489
    Abstract: Successive values of a horizontal phase of a video signal are determined a predetermined integer number of video lines after the successive occurrences of vertical synchronization pulses. The successive values of a parity bit are updated according to the successive values of the horizontal phase. Indications on the parity of the fields are provided from the successive values of the parity bit.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: April 4, 2006
    Assignee: STMicroelectronics S.A.
    Inventors: Diego Coste, Ilija Materic, François Besson, Hervé Maffini
  • Method and device for detecting the parity of successive fields of an interlaced video signal
    Publication number: 20030081148
    Abstract: Successive values of a horizontal phase of a video signal are determined a predetermined integer number of video lines after the successive occurrences of vertical synchronization pulses. The successive values of a parity bit are updated according to the successive values of the horizontal phase. Indications on the parity of the fields are provided from the successive values of the parity bit.
    Type: Application
    Filed: October 29, 2002
    Publication date: May 1, 2003
    Applicant: STMicroelectronics S.A.
    Inventors: Diego Coste, Ilija Materic, Francois Besson, Herve Maffini