Patents by Inventor Iliya Lyalin

Iliya Lyalin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070094631
    Abstract: The present disclosure is directed to a method and apparatus for dividing an integrated circuit design field into a plurality of congestion rectangles having user-selectable sizes. A routing congestion value is estimated for each congestion rectangle prior to routing interconnections within the design field. The congestion values are stored in machine-readable memory and are updated in response to wire changes within the design field.
    Type: Application
    Filed: October 26, 2005
    Publication date: April 26, 2007
    Applicant: LSI Logic Corporation
    Inventors: Alexei Galatenko, Elyar Gasanov, Iliya Lyalin
  • Publication number: 20070050744
    Abstract: The present disclosure is directed to a method of selecting cells in an integrated circuit for logic restructuring of an original design. The original design includes a set of parameters. The method includes forming a restructuring set that will include the selected cells for logic restructuring, and a candidate set. The restructuring set includes restructuring cells with an initial cell. The restructuring set is adapted to accept additional cells identified as restructuring cells. The candidate set is adapted to include candidate cells, where each candidate cell in the candidate set is connected to at least one of the restructuring cells in the restructuring set. The candidate set is adapted to remove candidate cells from the candidate set. The restructuring set is adapted to accept selected removed candidate cells as identified restructuring cells if a corresponding parameter is included in the set of parameters.
    Type: Application
    Filed: October 20, 2006
    Publication date: March 1, 2007
    Applicant: LSI Logic Corporation
    Inventors: Iliya Lyalin, Andrej Zolotykh, Elyar Gasanov, Alexei Galatenko
  • Publication number: 20060112361
    Abstract: The present disclosure is directed to a method of selecting cells in an integrated circuit for logic restructuring of an original design. The original design includes a set of parameters. The method includes forming a restructuring set that will include the selected cells for logic restructuring, and a candidate set. The restructuring set includes restructuring cells with an initial cell. The restructuring set is adapted to accept additional cells identified as restructuring cells. The candidate set is adapted to include candidate cells, where each candidate cell in the candidate set is connected to at least one of the restructuring cells in the restructuring set. The candidate set is adapted to remove candidate cells from the candidate set. The restructuring set is adapted to accept selected removed candidate cells as identified restructuring cells if a corresponding parameter is included in the set of parameters.
    Type: Application
    Filed: November 19, 2004
    Publication date: May 25, 2006
    Applicant: LSI Logic Corporation
    Inventors: Iliya Lyalin, Andrej Zolotykh, Elyar Gasanov, Alexei Galatenko
  • Publication number: 20060048087
    Abstract: An iterative process assigns nodes of a new logical tree to positions in a space that was previously assigned to an old logical tree equivalent to the new logical tree. A path in the new tree is identified for an essential node of the new tree. Coordinates of a position in the space are identified for an old tree node that is equivalent to a son of the essential node. Coordinates are iteratively identified for each node in the new tree path using a free space algorithm and based on the nodes of the new tree path and the coordinates identified for the old tree node that is equivalent to the son of the essential node. If all sons of the essential node are leaves of the new tree, the old tree node is a leaf node equivalent to the son. Otherwise, the old tree node is identified in a prior iteration.
    Type: Application
    Filed: August 27, 2004
    Publication date: March 2, 2006
    Applicant: LSI Logic Corporation
    Inventors: Elyar Gasanov, Iliya Lyalin, Alexei Galatenko, Andrej Zolotykh