Abstract: Lead frames for light emitting device packages, light emitting device packages, and illumination apparatuses employing the light emitting device packages. The lead frame including a plurality of mounting portions on which a plurality of light emitting device chips are mounted; a plurality of connection portions for circuit connecting the plurality of light emitting device chips; a terminal portion extended from the plurality of connection portions. The light emitting device package is formed by directly mounting the plurality of light emitting device chips on the lead frame and packaging the mounted light emitting device chips on the lead frame. The lead frame includes a plurality of connection portions for circuit connecting the plurality of light emitting device chips and a terminal portion in which a part of a circuit thereof is exposed.

Abstract: An illumination apparatus includes a light source unit comprising at least one light source module comprising a plurality of light-emitting device chips and a lead frame on which the light-emitting device chips are mounted and which connects the mounted light-emitting device chips; a diffusion cover having an interior space in which the light source module is accommodated and diffusing light emitted from the light source module; and an installation portion formed adjacent to the diffusion cover to install the light source module.

Abstract: An illumination apparatus includes a light source unit comprising at least one light source module comprising a plurality of light-emitting device chips and a lead frame on which the light-emitting device chips are mounted and which connects the mounted light-emitting device chips; a diffusion cover having an interior space in which the light source module is accommodated and diffusing light emitted from the light source module; and an installation portion formed adjacent to the diffusion cover to install the light source module.

Abstract: Lead frames for light emitting device packages, light emitting device packages, and illumination apparatuses employing the light emitting device packages. The lead frame including a plurality of mounting portions on which a plurality of light emitting device chips are mounted; a plurality of connection portions for circuit connecting the plurality of light emitting device chips; a terminal portion extended from the plurality of connection portions. The light emitting device package is formed by directly mounting the plurality of light emitting device chips on the lead frame and packaging the mounted light emitting device chips on the lead frame. The lead frame includes a plurality of connection portions for circuit connecting the plurality of light emitting device chips and a terminal portion in which a part of a circuit thereof is exposed.

Abstract: Lead frames for light emitting device packages, light emitting device packages, and illumination apparatuses employing the light emitting device packages. The lead frame including a plurality of mounting portions on which a plurality of light emitting device chips are mounted; a plurality of connection portions for circuit connecting the plurality of light emitting device chips; a terminal portion extended from the plurality of connection portions. The light emitting device package is formed by directly mounting the plurality of light emitting device chips on the lead frame and packaging the mounted light emitting device chips on the lead frame. The lead frame includes a plurality of connection portions for circuit connecting the plurality of light emitting device chips and a terminal portion in which a part of a circuit thereof is exposed.

Abstract: A lead frame for a chip package, a chip package, a package module, and an illumination apparatus including the chip package module. The chip package includes a first coupling portion and a second coupling portion that are coupled to each other on edges of a lead frame for mounting a chip thereon, and thus a package module is easily embodied by coupling the first coupling portion and the second coupling portion to each other.

Abstract: A light emitting device (LED), a manufacturing method thereof, and an LED module using the same. The LED may include a first semiconductor layer, an active layer, and a second semiconductor layer formed sequentially on a light-transmitting substrate, a first electrode formed in a region exposed by removing a part of the first semiconductor layer, a second electrode formed on the second semiconductor layer, a passivation layer formed on the first electrode and the second electrode to expose a region of the first electrode and a region of the second electrode, a first bump formed in a first region including the first electrode exposed through the passivation layer, and extended to another region of the second electrode on which the passivation layer is formed, and a second bump formed in a second region including the second electrode exposed through the passivation layer.

Abstract: An illumination apparatus includes a light source unit comprising at least one light source module comprising a plurality of light-emitting device chips and a lead frame on which the light-emitting device chips are mounted and which connects the mounted light-emitting device chips; a diffusion cover having an interior space in which the light source module is accommodated and diffusing light emitted from the light source module; and an installation portion formed adjacent to the diffusion cover to install the light source module.

Abstract: Lead frames for light emitting device packages, light emitting device packages, and illumination apparatuses employing the light emitting device packages. The lead frame including a plurality of mounting portions on which a plurality of light emitting device chips are mounted; a plurality of connection portions for circuit connecting the plurality of light emitting device chips; a terminal portion extended from the plurality of connection portions. The light emitting device package is formed by directly mounting the plurality of light emitting device chips on the lead frame and packaging the mounted light emitting device chips on the lead frame. The lead frame includes a plurality of connection portions for circuit connecting the plurality of light emitting device chips and a terminal portion in which a part of a circuit thereof is exposed.

Abstract: A semiconductor device, capable of improving integration density and solving problems that may occur in a laser repair process, and a method of fabricating the same are provided. A fuse circuit is formed in a cell region, not in a peripheral region, and thus it is possible to reduce the size of a semiconductor chip.

Abstract: A semiconductor device, capable of improving integration density and solving problems that may occur in a laser repair process, and a method of fabricating the same are provided. A fuse circuit is formed in a cell region, not in a peripheral region, and thus it is possible to reduce the size of a semiconductor chip.

Abstract: A method of manufacturing a semiconductor package, including: preparing a first semiconductor chip, where a plurality of first central electrode pads are formed along a center of an active surface of the first semiconductor chip, preparing a second semiconductor chip, where a plurality of second central electrode pads are formed along a center region of an active surface of the second semiconductor chip, and a plurality of edge electrode pads are formed along an edge of the second semiconductor chip, attaching the second semiconductor chip to a substrate, connecting electrically the edge electrode pads of the second semiconductor chip to the substrate, encapsulating the connection between the edge electrode pads and the substrate, forming a plurality of metal bumps on the central electrode pads of the second semiconductor chip, and stacking the first semiconductor chip on the second semiconductor chip so that the first central electrode pads of the first semiconductor chip attach to the respective second cent

Abstract: A semiconductor device, capable of improving integration density and solving problems that may occur in a laser repair process, and a method of fabricating the same are provided. A fuse circuit is formed in a cell region, not in a peripheral region, and thus it is possible to reduce the size of a semiconductor chip.

Abstract: An improved dual die package is disclosed. The dual die package includes a first lead frame connected to a first semiconductor chip and a second lead frame connected to a second semiconductor chip. The first leads and the second leads are electrically connected to one another using a wirebonding process rather than a thermocompression process thereby allowing conventional packaging equipment to be used when manufacturing a dual die package.

Abstract: A method for manufacturing a semiconductor chip package includes: preparing a semiconductor chip having center and edge bonding pads and a substrate, which includes a first window, a second window, connection pads, external terminal pads, and a wiring pattern; attaching the semiconductor chip on the substrate such that the first window exposes the center bonding pads and the second window exposes the edge bonding pads; connecting the first and second bonding pads to corresponding connection pads; encapsulating side surfaces of the semiconductor chip, a portion of the bottom surface of the substrate, the bonding wires, and the connection pads; and forming external terminals on the external terminal pads of the substrate. The encapsulating includes a first encapsulation of the side surfaces of the semiconductor chip and a portion of the bottom surface of the substrate and a second encapsulation of the bonding wires and the connection pads.

Abstract: A semiconductor package includes a first semiconductor chip, a second semiconductor chip, a substrate, and metal bumps. The first semiconductor chip has first central electrode pads along a center of the first semiconductor chip. The second semiconductor chip has second central electrode pads along a center of the second semiconductor chip and edge electrode pads along an edge of the second semiconductor chip. The metal bumps connect the first central electrode pads of the first semiconductor chip to the second central electrode pads of the second semiconductor chip. The second semiconductor chip is mounted on the substrate, and the edge electrode pads of the second semiconductor chip are electrically connected to the substrate.

Abstract: A semiconductor device, capable of improving integration density and solving problems that may occur in a laser repair process, and a method of fabricating the same are provided. A fuse circuit is formed in a cell region, not in a peripheral region, and thus it is possible to reduce the size of a semiconductor chip.

Abstract: A semiconductor package includes a first semiconductor chip, a second semiconductor chip, a substrate, and metal bumps. The first semiconductor chip has first central electrode pads along a center of the first semiconductor chip. The second semiconductor chip has second central electrode pads along a center of the second semiconductor chip and edge electrode pads along an edge of the second semiconductor chip. The metal bumps connect the first central electrode pads of the first semiconductor chip to the second central electrode pads of the second semiconductor chip. The second semiconductor chip is mounted on the substrate, and the edge electrode pads of the second semiconductor chip are electrically connected to the substrate.

Abstract: A stack package has a lead frame and first and second stacked chips. The lead frame comprises first and second lead groups respectively corresponding to the first and second chips and a plurality of external connection terminals for electrically interconnecting the first and second chips to an external device. Each of the first and second chips has its own common and independent electrode pads, and each of the first and second lead groups has its own common and independent leads. The common leads and the common electrode pads are for address and control signals to and from the first and second chips, and the independent leads and the independent electrode pads are for data input and output to and from the first and second chips.

Abstract: A stack package has a lead frame and first and second stacked chips. The lead frame comprises first and second lead groups respectively corresponding to the first and second chips and a plurality of external connection terminals for electrically interconnecting the first and second chips to an external device. Each of the first and second chips has its own common and independent electrode pads, and each of the first and second lead groups has its own common and independent leads. The common leads and the common electrode pads are for address and control signals to and from the first and second chips, and the independent leads and the independent electrode pads are for data input and output to and from the first and second chips.