Abstract: A memory cell includes: a substrate; an active layer spaced apart from a surface of the substrate and extending in a direction which is parallel to the surface of the substrate; a bit line coupled to one side of the active layer and extending in a direction perpendicular to the surface of the substrate; a capacitor coupled to another side of the active layer and spaced apart from the surface of the substrate; and a word line vertically spaced apart from the active layer and extending in a direction intersecting with the active layer, wherein the word line includes a first notch-shaped sidewall and a second notch-shaped sidewall that face each other.

Abstract: A memory cell includes: a substrate; an active layer spaced apart from a surface of the substrate and extending in a direction which is parallel to the surface of the substrate; a bit line coupled to one side of the active layer and extending in a direction perpendicular to the surface of the substrate; a capacitor coupled to another side of the active layer and spaced apart from the surface of the substrate; and a word line vertically spaced apart from the active layer and extending in a direction intersecting with the active layer, wherein the word line includes a first notch-shaped sidewall and a second notch-shaped sidewall that face each other.

Abstract: A memory cell includes: a substrate; an active layer spaced apart from a surface of the substrate and extending in a direction which is parallel to the surface of the substrate; a bit line coupled to one side of the active layer and extending in a direction perpendicular to the surface of the substrate; a capacitor coupled to another side of the active layer and spaced apart from the surface of the substrate; and a word line vertically spaced apart from the active layer and extending in a direction intersecting with the active layer, wherein the word line includes a first notch-shaped sidewall and a second notch-shaped sidewall that face each other.

Abstract: A method for fabricating a semiconductor device includes forming a low-k dielectric layer, forming a pattern by etching the low-k dielectric layer, and implanting a carbon-containing material into a surface of the pattern.

Abstract: The present invention discloses a junction method of a spacer in a field emission display. An adhesive strength between a spacer and an anode substrate is improved by preventing the spacer from being separated due to separation of a metal-back thin film, by printing a frit at the lower portion of the metal-back thin film. Moreover, the metal-back thin film is deposited on the frit, thereby preventing surface charge accumulation or arcing due to electron collision during the driving of the field emission display.

Abstract: The present invention discloses a junction method of a spacer in a field emission display. An adhesive strength between a spacer and an anode substrate is improved by preventing the spacer from being separated due to separation of a metal-back thin film, by printing a frit at the lower portion of the metal-back thin film. Moreover, the metal-back thin film is deposited on the frit, thereby preventing surface charge accumulation or arcing due to electron collision during the driving of the field emission display.