Abstract: In one example, an apparatus comprises: a direct memory access (DMA) descriptor queue that stores DMA descriptors, each DMA descriptor including an indirect address; an address translation table that stores an address mapping between indirect addresses and physical addresses; and a DMA engine configured to: fetch a DMA descriptor from the DMA descriptor queue to the address translation table to translate a first indirect address of the DMA descriptor to a first physical address based on the address mapping, and perform a DMA operation based on executing the DMA descriptor to transfer data to or from the first physical address.

Abstract: A reel based tensioning device includes a housing, a spool that is rotatably positioned within the housing, and a knob member that is operably coupled with the spool to cause the spool to rotate in a first direction within the housing and thereby wind a tension member about the spool. The reel based tensioning device also includes a load holding mechanism that is coupled with the spool and that is configured to rotate the spool in the first direction within the housing and to prevent rotation of the spool in a second direction to prevent unwinding of the tension member from about the spool. The reel based tensioning device further includes an audible component that is configured to produce an audible noise responsive to operation of the knob member to signal an adjustment of the tension member.

Abstract: Embodiments include techniques for enabling execution of N inferences on an execution engine of a neural network device. Instruction code for a single inference is stored in a memory that is accessible by a DMA engine, the instruction code forming a regular code block. A NOP code block and a reset code block for resetting an instruction DMA queue are stored in the memory. The instruction DMA queue is generated such that, when it is executed by the DMA engine, it causes the DMA engine to copy, for each of N inferences, both the regular code block and an additional code block to an instruction buffer. The additional code block is the NOP code block for the first N?1 inferences and is the reset code block for the Nth inference. When the reset code block is executed by the execution engine, the instruction DMA queue is reset.

Abstract: A closure system for a boot or other footwear includes a tension member that is disposed within the boot and routed or guided about a path within the boot via one or more guides. The closure system also includes an adjustment member that is disposed within the boot and operably coupled with the tension member. The closure system further includes a reel based closure device having a knob that is operable to tension the tension member and to release tension from the tension member. Tensioning of the tension member adjusts a fit of the adjustment member about a foot within the boot to secure the foot within the boot and loosening of the tension member adjusts the fit of the adjustment member about the foot to allow the foot to be more easily removed from the boot.

Abstract: A reel based tensioning device includes a housing, a spool that is rotatably positioned within the housing, and a knob member that is operably coupled with the spool to cause the spool to rotate in a first direction within the housing and thereby wind a tension member about the spool. The reel based tensioning device also includes a load holding mechanism that is coupled with the spool and that is configured to rotate the spool in the first direction within the housing and to prevent rotation of the spool in a second direction to prevent unwinding of the tension member from about the spool. The reel based tensioning device further includes an audible component that is configured to produce an audible noise responsive to operation of the knob member to signal an adjustment of the tension member.

Abstract: To reduce direct memory access (DMA) overhead, a tensorized descriptor can be used to generate a series of memory descriptors to perform a series of DMA data transfers. The tensorized descriptor may include attributes such as a stride and a memory descriptor template, which can be used to generate the series of memory descriptors. Hence, instead of having to retrieve each of the memory descriptors to perform the series of DMA transfers, a single tensorized descriptor can be retrieved to perform a series of data transfers.

Abstract: Remote access for debugging or profiling a remotely executing neural network graph can be performed by a client using an in-band application programming interface (API). The client can provide indicator flags for debugging or profiling in an inference request sent to a remote server computer executing the neural network graph using the API. The remote server computer can collect metadata for debugging or profiling during the inference operation using the neural network graph and send it back to the client using the same API. Additionally, the metadata can be collected at various granularity levels also specified in the inference request.

Abstract: Embodiments include techniques for enabling execution of N inferences on an execution engine of a neural network device. Instruction code for a single inference is stored in a memory that is accessible by a DMA engine, the instruction code forming a regular code block. A NOP code block and a reset code block for resetting an instruction DMA queue are stored in the memory. The instruction DMA queue is generated such that, when it is executed by the DMA engine, it causes the DMA engine to copy, for each of N inferences, both the regular code block and an additional code block to an instruction buffer. The additional code block is the NOP code block for the first N?1 inferences and is the reset code block for the Nth inference. When the reset code block is executed by the execution engine, the instruction DMA queue is reset.

Abstract: According to an embodiment, a component for attachment to an article includes an upper component that is made of a thermoplastic material having a first melting temperature and a flange member that is molded onto the upper component and made of a thermoplastic elastomer material having a second melting temperature that is lower than the first melting temperature of the upper component. The flange member extends laterally from a bottom end of the upper component so that a bottom surface of the flange member is flush with or positioned axially below a bottom surface of the upper component. The melting temperature of the thermoplastic elastomer material enables the flange member to be directly coupled to the article via heat welding and the like without substantially affecting the upper component.

Abstract: A reel based tensioning device includes a housing, a spool that is rotatably positioned within the housing, and a knob member that is operably coupled with the spool to cause the spool to rotate in a first direction within the housing and thereby wind a tension member about the spool. The reel based tensioning device also includes a load holding mechanism that is coupled with the spool and that is configured to rotate the spool in the first direction within the housing and to prevent rotation of the spool in a second direction to prevent unwinding of the tension member from about the spool. The reel based tensioning device further includes an audible component that is configured to produce an audible noise responsive to operation of the knob member to signal an adjustment of the tension member.

Abstract: According to an embodiment, a component for attachment to an article includes an upper component that is made of a thermoplastic material having a first melting temperature and a flange member that is molded onto the upper component and made of a thermoplastic elastomer material having a second melting temperature that is lower than the first melting temperature of the upper component. The flange member extends laterally from a bottom end of the upper component so that a bottom surface of the flange member is flush with or positioned axially below a bottom surface of the upper component. The melting temperature of the thermoplastic elastomer material enables the flange member to be directly coupled to the article via heat welding and the like without substantially affecting the upper component.

Abstract: A reel based tensioning device includes a housing, a spool that is rotatably positioned within the housing, and a knob member that is operably coupled with the spool to cause the spool to rotate in a first direction within the housing and thereby wind a tension member about the spool. The reel based tensioning device also includes a load holding mechanism that is coupled with the spool and that is configured to rotate the spool in the first direction within the housing and to prevent rotation of the spool in a second direction to prevent unwinding of the tension member from about the spool. The reel based tensioning device further includes an audible component that is configured to produce an audible noise responsive to operation of the knob member to signal an adjustment of the tension member.

Abstract: An integrated circuit device implementing a neural network accelerator may have a peripheral bus interface to interface with a host memory, and neural network models can be loaded from the host memory onto the state buffer of the neural network accelerator for execution by the array of processing elements. The neural network accelerator may also have a memory interface to interface with a local memory. The local memory may store neural network models from the host memory, and the models can be loaded from the local memory into the state buffer with reduced latency as compared to loading from the host memory. In systems with multiple accelerators, the models in the local memory can also be shared amongst different accelerators.

Abstract: Integrated circuit devices and methods for synchronizing execution of program code for multiple concurrently operating execution engines of the integrated circuit devices are provided. In some cases, one execution engine of an integrated circuit device may be dependent on the operation of another execution engine of the integrated circuit device. To synchronize the execution engines around the dependency, a first execution engine may execute an instruction to set a value in a register while a second execution engine may execute an instruction to wait for a condition associated with the register value.

Abstract: Some embodiments of reassembly-free deep packet inspection (DPD on multicore hardware have been presented. In one embodiment, a set of packets of one or more files is received at a networked device from one or more connections. Each packet is scanned using one of a set of processing cores in the networked device without buffering the one or more files in the networked device. Furthermore, the set of processing cores may scan the packets substantially concurrently.

Abstract: Systems and methods for non-intrusive hardware profiling are provided. In some cases integrated circuit devices can be manufactured without native support for performance measurement and/or debugging capabilities, thereby limiting visibility into the integrated circuit device. Understanding the timing of operations can help to determine whether the hardware of the device is operating correctly and, when the device is not operating correctly, provide information that can be used to debug the device. In order to measure execution time of various tasks performed by the integrated circuit device, program instructions may be inserted to generate notifications that provide tracing information, including timestamps, for operations executed by the integrated circuit device.

Abstract: A tightening device for tightening an article includes an elongate panel that is positionable about the article. The elongate panel has a proximal end and a distal end. A tensioning mechanism is coupled with the proximal end of the elongate panel. The tightening device also includes a tension member that is operably coupled with the tensioning mechanism so that an operation of the tensioning mechanism adjusts a tension of the tension member. The tightening device further includes at least one guide member that is coupled with the elongate panel between the proximal end and the distal end. The tension member is operable with the at least one guide member so that the tension member is routed about the article and along a portion of the elongate panel.

Abstract: A method for packet processing on a multi-core processor. According to one embodiment of the invention, a first set of one or more processing cores are configured to include the capability to process packets belonging to a first set of one or more packet types, and a second set of one or more processing cores are configured to include the capability to process packets belonging to a second set of one or more packet types, where the second set of packet types is a subset of the first set of packet types. Packets belonging to the first set of packet types are processed at a processing core of either the first or second set of processing cores. Packets belonging to the second set of packet types are processed at a processing core of the first set of processing cores.

Abstract: Systems and methods are provided for synchronizing execution of program code for an integrated circuit device having multiple concurrently operating execution engines, where the operation of one execution engine may be dependent on the operation of another execution engine. Data or resource dependencies may be accommodated with a Set instruction to cause a first execution engine to set a register value and a Wait instruction to cause a second execution engine to wait for a condition associate with the register value. Concurrently operation of the execution engines may thus be synchronized.

Abstract: Embodiments include techniques for enabling execution of N inferences on an execution engine of a neural network device. Instruction code for a single inference is stored in a memory that is accessible by a DMA engine, the instruction code forming a regular code block. A NOP code block and a reset code block for resetting an instruction DMA queue are stored in the memory. The instruction DMA queue is generated such that, when it is executed by the DMA engine, it causes the DMA engine to copy, for each of N inferences, both the regular code block and an additional code block to an instruction buffer. The additional code block is the NOP code block for the first N?1 inferences and is the reset code block for the Nth inference. When the reset code block is executed by the execution engine, the instruction DMA queue is reset.