Patents by Inventor Ilya Popeko

Ilya Popeko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070155176
    Abstract: Methods of electroless plating metal on a dielectric material includes dipping the dielectric in a solution containing attractive catalytic metal particles and a metal salt solution. A thicker metallic layer can be deposited on top of the resulting layer by electroplating. Electrical circuits and multichip modules including such circuits can be formed having one or more dielectric layers comprised of latex and one or more layers of conductive leads, one or more dielectric layers comprised of a flexible dielectric material, and one or more layers of electrically conductive material patterned to interconnect such ICs. Frames that hold ICs against a substrate may be employed to planarize their top surfaces against the substrate, as well as standard photolithographic techniques in creating conductive paths on the dielectric material between the ICs.
    Type: Application
    Filed: February 15, 2007
    Publication date: July 5, 2007
    Applicant: Custom One Design, Inc.
    Inventors: Peter Nuytkens, Ilya Popeko, Joseph Kulinets
  • Publication number: 20050153061
    Abstract: Methods of electroless plating metal on a dielectric material includes dipping the dielectric in a solution containing attractive catalytic metal particles and a metal salt solution. A thicker metallic layer can be deposited on top of the resulting layer by electroplating. Electrical circuits and multichip modules including such circuits can be formed having one or more dielectric layers comprised of latex and one or more layers of conductive leads, one or more dielectric layers comprised of a flexible dielectric material, and one or more layers of electrically conductive material patterned to interconnect such ICs. Frames that hold ICs against a substrate may be employed to planarize their top surfaces against the substrate, as well as standard photolithographic techniques in creating conductive paths on the dielectric material between the ICs.
    Type: Application
    Filed: December 13, 2004
    Publication date: July 14, 2005
    Applicant: Custom One Design, Inc.
    Inventors: Peter Nuytkens, Ilya Popeko, Joseph Kulinets
  • Publication number: 20050005424
    Abstract: Method of forming a ferromagnetic layer on at least one surface of a dielectric material that may be serve as an inductive core on a printed circuit board or a multichip module. Conductive leads can form two separate coils around the core to form a transformer, and a planar conducing sheet can be placed on or between one or more of the dielectric layers as magnetic shielding. The core can be formed at least in part by electroless plating, and electroplating can be used to add a thicker layer of less conductive ferromagnetic material. Ferromagnetic layers are formed by dipping the dielectric surface in a solution containing catalytic metal particles having a slight dipole, and placing the surface in a metal salt to cause a layer containing metal to be electrolessly plated upon the dielectric. Surface roughening techniques can be used before the dipping to help attract the catalytic particles.
    Type: Application
    Filed: February 23, 2004
    Publication date: January 13, 2005
    Inventors: Peter Nuytkens, Ilya Popeko, Joseph Kulinets