Patents by Inventor Imola ZIGONEANU

Imola ZIGONEANU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230420456
    Abstract: Integrated circuit structures having source or drain structures with low resistivity are described. In an example, integrated circuit structure includes a fin having a lower fin portion and an upper fin portion. A gate stack is over the upper fin portion of the fin, the gate stack having a first side opposite a second side. A first source or drain structure includes an epitaxial structure embedded in the fin at the first side of the gate stack. A second source or drain structure includes an epitaxial structure embedded in the fin at the second side of the gate stack. Each epitaxial structure of the first and second source or drain structures include silicon, germanium, gallium and boron. The first and second source or drain structures have a resistivity less than 2E-9 Ohm cm2.
    Type: Application
    Filed: June 27, 2022
    Publication date: December 28, 2023
    Inventors: Debaleena NANDI, Imola ZIGONEANU, Gilbert DEWEY, Anant H. JAHAGIRDAR, Harold W. KENNEL, Pratik PATEL, Anand S. MURTHY, Chi-Hing CHOI, Mauro J. KOBRINSKY, Tahir GHANI