Abstract: A method of fabricating ICs including thin film resistors (TFRs) depositing a dielectric liner layer on a substrate including a semiconductor surface having a plurality of IC die formed therein each including functional circuitry comprising a plurality of interconnected transistors. A TFR layer comprising chromium (Cr) is deposited on the dielectric liner layer. The TFR layer is plasma treated with atomic nitrogen and atomic hydrogen. A dielectric capping layer is deposited on the TFR layer after the plasma treating. A pattern is formed on the capping layer, and the TFR layer is etched to form at least one resistor that comprises the TFR layer.

Abstract: An integrated circuit and method includes a DEMOS transistor with improved CHC reliability that has a lower resistance surface channel under the DEMOS gate that transitions to a lower resistance subsurface channel under the drain edge of the DEMOS transistor gate.

Abstract: An integrated circuit with vias with different depths stopping on etch stop layers with different thicknesses. A method of simultaneously etching vias with different depths without causing etch damage to the material being contacted by the vias.

Abstract: An integrated circuit with vias with different depths stopping on etch stop layers with different thicknesses. A method of simultaneously etching vias with different depths without causing etch damage to the material being contacted by the vias.

Abstract: An integrated circuit and method includes a DEMOS transistor with improved CHC reliability that has a lower resistance surface channel under the DEMOS gate that transitions to a lower resistance subsurface channel under the drain edge of the DEMOS transistor gate.

Abstract: An integrated circuit with vias with different depths stopping on etch stop layers with different thicknesses. A method of simultaneously etching vias with different depths without causing etch damage to the material being contacted by the vias.

Abstract: An integrated circuit and method includes a DEMOS transistor with improved CHC reliability that has a lower resistance surface channel under the DEMOS gate that transitions to a lower resistance subsurface channel under the drain edge of the DEMOS transistor gate.

Abstract: An integrated circuit and method includes a DEMOS transistor with improved CHC reliability that has a lower resistance surface channel under the DEMOS gate that transitions to a lower resistance subsurface channel under the drain edge of the DEMOS transistor gate.

Abstract: An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, doped n-type throughout its length, and includes portions serving as gate electrodes of n-channel and p-channel MOS transistors; a plate of a metal-to-poly storage capacitor; and a plate of poly-to-active tunneling capacitors. The p-channel MOS transistor includes a buried channel region, formed by way of ion implantation, disposed between its source and drain regions. Silicide-block silicon dioxide blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit are silicide-clad.

Abstract: An integrated circuit with vias with different depths stopping on etch stop layers with different thicknesses. A method of simultaneously etching vias with different depths without causing etch damage to the material being contacted by the vias.

Abstract: An integrated circuit with vias with different depths stopping on etch stop layers with different thicknesses. A method of simultaneously etching vias with different depths without causing etch damage to the material being contacted by the vias.

Abstract: An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, doped n-type throughout its length, and includes portions serving as gate electrodes of n-channel and p-channel MOS transistors; a plate of a metal-to-poly storage capacitor; and a plate of poly-to-active tunneling capacitors. The p-channel MOS transistor includes a buried channel region, formed by way of ion implantation, disposed between its source and drain regions. Silicide-block silicon dioxide blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit are silicide-clad.

Abstract: An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, and includes portions serving as a transistor gate electrode, a plate of a metal-to-poly storage capacitor, and a plate of poly-to-active tunneling capacitors. A silicide-block film comprised of a layer of silicon dioxide underlying a top layer of silicon nitride blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit, such as polysilicon-to-metal capacitors, are silicide-clad. Following silicidation, a capacitor dielectric is deposited over the remaining polysilicon structures, followed by formation of an upper metal plate.

Abstract: An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, and includes portions serving as a transistor gate electrode, a plate of a metal-to-poly storage capacitor, and a plate of poly-to-active tunneling capacitors. A silicide-block film comprised of a layer of silicon dioxide underlying a top layer of silicon nitride blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit, such as polysilicon-to-metal capacitors, are silicide-clad. Following silicidation, a capacitor dielectric is deposited over the remaining polysilicon structures, followed by formation of an upper metal plate.

Abstract: An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, and includes portions serving as a transistor gate electrode, a plate of a metal-to-poly storage capacitor, and a plate of poly-to-active tunneling capacitors. A silicide-block film comprised of a layer of silicon dioxide underlying a top layer of silicon nitride blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit, such as polysilicon-to-metal capacitors, are silicide-clad. Following silicidation, a capacitor dielectric is deposited over the remaining polysilicon structures, followed by formation of an upper metal plate.

Abstract: An integrated circuit with a high precision MIM capacitor and a high precision resistor with via etch stop landing pads on the resistor heads that are formed with the capacitor bottom plate material. A process of forming an integrated circuit with a high precision MIM capacitor and a high precision resistor where via etch stop landing pads over the resistor heads are formed using the same layer that is used to form the capacitor bottom plate.

Abstract: An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, doped n-type throughout its length, and includes portions serving as gate electrodes of n-channel and p-channel MOS transistors; a plate of a metal-to-poly storage capacitor; and a plate of poly-to-active tunneling capacitors. The p-channel MOS transistor includes a buried channel region, formed by way of ion implantation, disposed between its source and drain regions. Silicide-block silicon dioxide blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit are silicide-clad.

Abstract: An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, and includes portions serving as a transistor gate electrode, a plate of a metal-to-poly storage capacitor, and a plate of poly-to-active tunneling capacitors. Silicide-block silicon dioxide blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit are silicide-clad.

Abstract: An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, and includes n-type and p-type doped portions serving as gate electrodes of n-channel and p-channel MOS transistors, respectively; a plate of a metal-to-poly storage capacitor; and a plate of poly-to-active tunneling capacitors. Silicide-block silicon dioxide blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit are silicide-clad. An opening at the surface of the analog floating-gate electrode, at the location at which n-type and p-type doped portions of the floating gate electrode abut, allow formation of silicide at that location, shorting the p-n junction.

Abstract: An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, and includes portions serving as a transistor gate electrode, a plate of a metal-to-poly storage capacitor, and a plate of poly-to-active tunneling capacitors. A silicide-block film comprised of a layer of silicon dioxide underlying a top layer of silicon nitride blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit, such as polysilicon-to-metal capacitors, are silicide-clad. Following silicidation, a capacitor dielectric is deposited over the remaining polysilicon structures, followed by formation of an upper metal plate.