Abstract: The invention relates to a circuit and associated method for synchronizing clock pulses, which enables, with a combined pulse spacing coding and pulse width coding, a simultaneous, collision-free, real time transmission of a number of plesiochronous reference clock signals on a bus line between network units, whereby the selection of the redundant reference clock pulses ensues without involving a central control unit that controls the first and second network unit.

Abstract: The inventive circuit and corresponding method are used to form a universal referenece cycle interface for any synchronous source, whereby compensation processes and level compensations adaptively occur at decision thresholds.

Abstract: The invention is directed to an arrangement for clock supply of a high bit-rate switching network structures in a digital narrowband switching system such as EWSD. A clock frequency signal (CLK2) traditionally generated with a crystal-controlled oscillator (11) as well as a corresponding frame clock signal (FMB2) are converted into low-voltage CMOS level signals and supplied to a system PLL (2) for high frequencies. This contains a discretely constructed VCO 6 with a sine oscillator that derives a higher-frequency signal from the supplied clock signal and converts this into a high-frequency clock signal (CLK92) of the output side. A feedback signal derived in this part serves as an input-side feedback signal for a phase detector (8) in low-voltage CMOS technology.

Abstract: The transmission of high-frequency low-voltage signals between systems of different low-voltage technology fields is often desired. In the conversion from systems with low Vss parameters to systems with high Vss parameters, the invention uses a wired high-frequency transformer (T1), whereby the wiring contains passive components that allow the setting of the conversion parameters. A dc-related coupling of the transformer is also provided. In the reverse conversion, the invention includes an RC attenuation element (R4, C2) and a shunt resistor (R5) to the supply voltage. High immunity to noise and great adaptability are achieved in addition to space-savings and cost-elimination. The application to the clock supply of high bit rate switching network structures is especially advantageous.