Patents by Inventor Imtaz Ali

Imtaz Ali has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7039901
    Abstract: The invention relates to a method for transparently maintaining cache coherency when debugging a multiple processor system with common shared memory. A software memory map representing the memory usage of the processors in the system to be debugged is created and in the software memory map is an indication of whether or not each processor has a cache. At least two debug sessions associated with two processors are activated. If an active debug session requests a write to a shared memory location, the request is executed and the software memory map is searched to located all processors having read access to that shared memory location. The write request is broadcast to each of the located processors so that each processor can perform any required cache updates.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: May 2, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Jeff L. Hunter, Mark L. Buser, Bruce W. C. Lee, Imtaz Ali
  • Patent number: 7007267
    Abstract: The invention relates to a method for transparently writing to shared memory when debugging a multiple processor system. In this method, a software memory map reflecting the memory usage of the processors in the system to be debugged is created. Two or more debug sessions associated with processors in the system are activated. When a debug session makes a write request to a shared memory location, a check is made to see if the processor associated with that debug session has write access to the shared memory location. If it does, that processor is used to execute the write. If it does not, the software memory map is searched to find a processor that does have write access to the shared memory location and that processor is used to execute the write.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: February 28, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Jeff L. Hunter, Mark L. Buser, Bruce W. C. Lee, Imtaz Ali
  • Patent number: 6990657
    Abstract: The invention relates to a method for maintaining coherency of software breakpoints in shared memory when debugging a multiple processor system. Using this method, at least two debug sessions associated with processors in the multiple processor system are activated. When a debug sessions sets a software breakpoint in a shared memory location, all active debug sessions are notified that the software breakpoint has been set. And, when a software breakpoint in shared memory is cleared by a debug session, all active debug sessions are notified that the software breakpoint has been removed.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: January 24, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Jeff L. Hunter, Mark L. Buser, Bruce W. C. Lee, Imtaz Ali
  • Patent number: 6925634
    Abstract: The invention relates to a method for transparently maintaining cache coherency when debugging a multiple processor system with common shared memory. A software memory map representing the memory usage of the processors in the system to be debugged is created and in the software memory map is an indication of whether or not each processor has a cache. At least two debug sessions associated with two processors are activated. If an active debug session requests a write to a shared memory location, the request is executed and the software memory map is searched to located all processors having read access to that shared memory location. The write request is broadcast to each of the located processors so that each processor can perform any required cache updates.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: August 2, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Jeff L. Hunter, Mark L. Buser, Bruce W.C. Lee, Imtaz Ali
  • Publication number: 20020100019
    Abstract: The invention relates to a method for transparently maintaining cache coherency when debugging a multiple processor system with common shared memory. A software memory map representing the memory usage of the processors in the system to be debugged is created and in the software memory map is an indication of whether or not each processor has a cache. At least two debug sessions associated with two processors are activated. If an active debug session requests a write to a shared memory location, the request is executed and the software memory map is searched to located all processors having read access to that shared memory location. The write request is broadcast to each of the located processors so that each processor can perform any required cache updates.
    Type: Application
    Filed: December 3, 2001
    Publication date: July 25, 2002
    Inventors: Jeff L. Hunter, Mark L. Buser, Bruce W.C. Lee, Imtaz Ali
  • Publication number: 20020100020
    Abstract: The invention relates to a method for transparently maintaining cache coherency when debugging a multiple processor system with common shared memory. A software memory map representing the memory usage of the processors in the system to be debugged is created and in the software memory map is an indication of whether or not each processor has a cache. At least two debug sessions associated with two processors are activated. If an active debug session requests a write to a shared memory location, the request is executed and the software memory map is searched to located all processors having read access to that shared memory location. The write request is broadcast to each of the located processors so that each processor can perform any required cache updates.
    Type: Application
    Filed: December 3, 2001
    Publication date: July 25, 2002
    Inventors: Jeff L. Hunter, Mark L. Buser, Bruce W.C. Lee, Imtaz Ali
  • Publication number: 20020100024
    Abstract: The invention relates to a method for maintaining coherency of software breakpoints in shared memory when debugging a multiple processor system. Using this method, at least two debug sessions associated with processors in the multiple processor system are activated. When a debug sessions sets a software breakpoint in a shared memory location, all active debug sessions are notified that the software breakpoint has been set. And, when a software breakpoint in shared memory is cleared by a debug session, all active debug sessions are notified that the software breakpoint has been removed.
    Type: Application
    Filed: December 3, 2001
    Publication date: July 25, 2002
    Inventors: Jeff L. Hunter, Mark L. Buser, Bruce W.C. Lee, Imtaz Ali
  • Publication number: 20020100021
    Abstract: The invention relates to a method for transparently writing to shared memory when debugging a multiple processor system. In this method, a software memory map reflecting the memory usage of the processors in the system to be debugged is created. Two or more debug sessions associated with processors in the system are activated. When a debug session makes a write request to a shared memory location, a check is made to see if the processor associated with that debug session has write access to the shared memory location. If it does, that processor is used to execute the write. If it does not, the software memory map is searched to find a processor that does have write access to the shared memory location and that processor is used to execute the write.
    Type: Application
    Filed: December 3, 2001
    Publication date: July 25, 2002
    Inventors: Jeff L. Hunter, Mark L. Buser, Bruce W.C. Lee, Imtaz Ali