Patents by Inventor Imtiaz Shaik

Imtiaz Shaik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5422891
    Abstract: This invention relates to a method and apparatus for robust delay fault testing of integrated circuits (IC) with built-in self-testing. For the method, hazardous nodes of the IC are determined. Thereafter, the topology of the IC can be modified to include a cut-point at hazardous nodes of the circuit. Input of the IC to the cut-point is diverted to an observation point. An out-put multi-input signature register (MISR) at the observation point generates a first signature. An output MISR provides a second signature for outputs to the IC. During testing, a hazard-free input pattern is applied to the IC and the generated first and second signatures are compared to known correct signatures.
    Type: Grant
    Filed: July 23, 1993
    Date of Patent: June 6, 1995
    Assignee: Rutgers University
    Inventors: Michael L. Bushnell, Imtiaz Shaik