Abstract: A memory device includes a memory cell array including a plurality of memory cells, a plurality of first even page buffers suitable for reading data from first even-numbered memory cells among the plurality of memory cells, and storing the read data, a plurality of first odd page buffers suitable for reading data from first odd-numbered memory cells among the plurality of memory cells, and storing the read data, and a plurality of first cache buffers corresponding to the first even page buffers, suitable for storing data received through a first common node from the first even page buffers, and a plurality of second cache buffers corresponding to the first odd page buffers, and suitable for storing data received through the first common node from the first odd page buffers.

Abstract: A first display apparatus includes a display; a communicator configured to communicate with a second display apparatus; and a processor configured to: display an image on the display, obtain a first ambient light value of a first ambient light of the first display apparatus, receive a second ambient light value of a second ambient light of the second display apparatus and a second image-quality value of the second display apparatus through the communicator, and adjust a first image-quality value of the displayed image based on the second image-quality value and the first ambient light value, by using a relationship between the second ambient light value of the second ambient light and the second image-quality value of the second display apparatus.

Abstract: The present disclosure relates to a motor driving apparatus and, more specifically, to a motor driving apparatus which allows a maximum torque operation by correcting an angle error occurring during quick acceleration of a motor in a sensorless system. The motor driving apparatus comprises: an inverter for driving a motor, using an alternating current voltage; and a control unit for outputting a PWM signal for controlling an operation of a switching element included in the inverter. Here, the control unit determines an inductance parameter used to calculate a speed command value for determining a duty ratio of a PWM signal, and determines whether the motor is being accelerated, on the basis of a current change measured from the inverter. When the motor is being accelerated, the control unit enables a maximum torque operation by reducing an angle error of a rotor through a correction of reducing a previously-determined inductance parameter.

Abstract: A package structure including a first semiconductor die, a second semiconductor die, a molding compound, an interconnect structure, first conductive features, through insulator vias, an insulating encapsulant and a redistribution layer is provided. The molding compound is encapsulating the first semiconductor die and the second semiconductor die. The interconnect structure is disposed on the molding compound and electrically connecting the first semiconductor die to the second semiconductor die. The first conductive features are electrically connected to the first semiconductor die and the second semiconductor die, wherein each of the first conductive features has a recessed portion. The through insulator vias are disposed on the recessed portion of the first conductive features and electrically connected to the first and second semiconductor die. The insulating encapsulant is encapsulating the interconnect structure and the through insulator vias.

Abstract: In an embodiment, a method includes: forming a first fin extending from a substrate, the substrate including silicon, the first fin including silicon germanium; forming an isolation region around the first fin, an oxide layer being formed on the first fin during formation of the isolation region; removing the oxide layer from the first fin with a hydrogen-based etching process, silicon at a surface of the first fin being terminated with hydrogen after the hydrogen-based etching process; desorbing the hydrogen from the silicon at the surface of the first fin to depassivate the silicon; and exchanging the depassivated silicon at the surface of the first fin with germanium at a subsurface of the first fin.

Abstract: The present disclosure provides a method of fabricating an integrated fan-out package including the following steps. A semiconductor die is laterally encapsulated by an insulating encapsulant. A redistribution circuit structure is formed on the insulating encapsulant and the semiconductor die, and the redistribution circuit structure is electrically connected to the semiconductor die. A forming method of the redistribution circuit structure includes the following steps. A conductive wiring is formed over the insulating encapsulant and the semiconductor die. A dielectric material is formed on the insulating encapsulant and the semiconductor die to cover the conductive wiring. A sacrificial layer is formed on the dielectric material, wherein a first top surface of the sacrificial layer is flatter than a second top surface of the dielectric material.

Abstract: Disclosed is a hidden data removal method based on an autoregressive generative model which is performed by a computer device. The hidden data removal method includes receiving a source image, randomly selecting a target pixel from the source image, and inputting the source image and an identifier of the target pixel to an autoregressive generative model and restoring the target pixel from the source image. The source image is an image in which steganography-based data is hidden, and the autoregressive generative model restores the target pixel on the basis of a pixel value distribution for pixels adjacent to the target pixel in the source image.

Abstract: An optical modifier may include a color controller including quantum dots, a barrier layer encapsulating the color controller, and a low refractive layer spaced apart from the color controller with the barrier layer interposed between the color controller and the barrier layer. The barrier layer may have a layer density ranging from 1.50 g/cm3 to 3.0 g/cm3.

Abstract: A treatment container (1) for accommodating an ophthalmic lens (2) comprises a bottom (3), a side wall (4) surrounding the bottom (3) and together with the bottom (3) forming a cavity (5) for accommodating the ophthalmic lens, a container opening (6) arranged opposite to the bottom (3), and a fluid opening (7) arranged in the bottom (3) or in the side wall (4) of the treatment container (1). The fluid opening (7) is in fluid communication with the cavity (5). The treatment container (1) further comprises a fluid conveyance channel (8) and a supply connector (9). The fluid conveyance channel (8) is connected to the fluid opening (7) so as to be in fluid communication with the fluid opening (7).

Abstract: Provided is a vacuum cleaner. The vacuum cleaner includes a cleaner body including a moving device for moving, a suction device connected to the cleaner body to suction dusts and air and guide the suctioned dusts and air to the cleaner body, the suction device including a handle, a detection device for detecting a distance between the handle and the cleaner body, and a controller determining whether movement of cleaner body is necessary on the basis of the distance between the cleaner body and the handle, the controller controlling the moving device when the movement of the cleaner body is necessary. The controller controls the moving device to allow the cleaner body to avoid an obstacle when it is determined that an operation for avoiding the obstacle is necessary while the moving device operates.

Abstract: Embodiments described herein include electronic packages and methods of forming such packages. An electronic package includes a package substrate, first conductive pads formed over the package substrate, where the first conductive pads have a first surface area, and second conductive pads over the package substrate, where the second conductive pads have a second surface area greater than the first surface area. The electronic package also includes a solder resist layer over the first and second conductive pads, and a plurality of solder resist openings that expose one of the first or second conductive pads. The solder resist openings of the electronic package may include conductive material that is substantially coplanar with a top surface of the solder resist layer. The electronic package further includes solder bumps over the conductive material in the solder resist openings, where the solder bumps have a low bump thickness variation (BTV).

Abstract: An operating method of an instant messenger application includes providing a first view including types of data sent and received through a chatroom, receiving a selection with respect to one of the types, and providing a second view integrating and displaying data corresponding to the selected type, among data sent and received in a plurality of chatrooms in which a user participates.

Abstract: A semiconductor memory device including a substrate including a first block and a second block each having a cell array region and a connection region, a stack including insulating layers and gate electrodes and extending from the cell array region to the connection region, first cell channel structures in the cell array region of the first block and passing through the stack to be electrically connected to the substrate, first dummy channel structures in the connection region of the first block and passing through the stack, second cell channel structures in the cell array region of the second block and passing through the stack, and second dummy channel structures in the connection region of the second block and passing through the stack may be provided. The first dummy channel structures are electrically insulated from the substrate, while the second dummy channel structures are electrically connected to the substrate.

Abstract: A method of controlling on-die termination (ODT) in a multi-rank system including a plurality of memory ranks is provided. The method includes: enabling ODT circuits of the plurality of memory ranks into an initial state when the multi-rank system is powered on; enabling the ODT circuits of a write target memory rank and non-target memory ranks among the plurality of memory ranks during a write operation; and disabling the ODT circuit of a read target memory rank among the plurality of memory ranks while enabling the ODT circuits of non-target memory ranks among the plurality of memory ranks during a read operation.

Abstract: The present invention relates to a composition for an organic optoelectronic diode, comprising a first compound for an organic optoelectronic diode; and a second compound for an organic optoelectronic diode, and an organic optoelectronic diode and a display device including the same.

Abstract: A semiconductor integrated circuit includes a sense amplifier circuit suitable for generating differential output signals by sensing and amplifying a level difference of differential input signals in response to a clock signal, and outputting the differential output signals to first and second nodes, respectively, a latch circuit suitable for feeding back and latching the differential output signals between the first and second nodes, and a control circuit suitable for controlling the feedback of the differential output signals between the first and second nodes in response to an initialization signal.

Abstract: A composite plate structure includes a composite plate and a resin component. The composite plate includes a first fiber layer, a second fiber layer and a core layer. The second fiber layer has a first region, wherein an area of the second fiber layer is smaller than an area of the first fiber layer. The core layer is disposed between the first fiber layer and the second fiber layer, wherein the core layer is exposed at the first region. The resin component is connected to the composite plate, wherein the resin component is combined with the core layer at the first region. In addition, a manufacturing method of the composite plate is also provided.

Abstract: The present invention relates to Fms-like tyrosine kinase (FLT3) inhibitors. The present invention provides novel 4-quinolinone derivatives used as FLT3 inhibitors and for treatment and/or prevention of tumors.

Abstract: A fan device includes a casing unit and a fan impeller unit mounted in the casing unit. The casing unit includes a casing body formed with a receiving space and an air outlet port, a porous plate formed with a plurality of through holes and is disposed in the receiving space to divide the receiving space into an air-flowing room and a noise-reduction room, and an air-entering tube in spatial communication with the air-flowing room. The fan impeller unit is disposed in the air-flowing room and rotatable to generate airflow partially flowing from the air-flowing room into the noise-reduction room through the through holes.

Abstract: An electronic device includes a foldable housing including a hinge structure, a first housing structure including a first surface facing a first direction and a second surface facing a second direction opposite to the first direction, a second housing structure including a third surface facing a third direction and a fourth surface facing a fourth direction opposite to the third direction, and folded with respect to the first housing structure about the hinge structure, a wireless communication circuitry disposed inside the first housing structure or the second housing structure, a sensor disposed inside the first housing structure or the second housing structure, a grip sensor circuitry disposed outside the first housing structure or the second housing structure, a processor disposed inside the first housing structure or the second housing structure, and a memory operatively connected with the processor.