Abstract: The present disclosure generally relates to an electronic assembly. The electronic assembly may include a semiconductor package including a first surface, an opposing second surface, and a side wall. The electronic assembly may also include a printed circuit board coupled to the second surface of the semiconductor package. The electronic assembly may further include at least one passive component array including one or more passive components at least partially embedded in a mold layer, each passive component further including a first terminal and a second terminal, wherein the first terminal of the passive component may be coupled to the printed circuit board and the passive component array may be attached to the side wall of the semiconductor package.

Abstract: The present disclosure generally relates to an electronic assembly. The electronic assembly may include a substrate including a plurality of first contact pads, a plurality of second contact pads, and a plurality of third contact pads. The electronic assembly may include a first device including a first footprint coupled to the substrate at a first surface. The electronic assembly may include a frame arranged between the first device and the substrate, the frame including a dielectric material, the frame further including a main frame extending around the first device, and further including a plurality of sub-frames encircling the plurality of first contact pads and the plurality of second contact pads on the substrate, wherein the frame may further include a conductive layer extending at least partially across the main frame.

Abstract: A device is provided, including a dielectric layer, a plurality of first conductive segments within the dielectric layer and spaced apart from each other by respective first spacings, and a plurality of second conductive segments within the dielectric layer and spaced apart from each other by respective second spacings. The plurality of second conductive segments may be over and spaced apart from the plurality of first conductive segments by the dielectric layer. A respective one of the first conductive segments may at least partially extend across a corresponding one of the second spacings, and a respective one of the second conductive segments may at least partially extend across a corresponding one of the first spacings.

Abstract: The present disclosure is directed to an electronic assembly and method of forming thereof. The electronic assembly may include a package substrate with a top substrate surface and an interposer coupled to the package substrate at the top substrate surface. The interposer may include a plurality of through interposer vias and an opening extending through the interposer. A power module may be arranged in the opening in the interposer and coupled to the package substrate at the top substrate surface. The power module may include a plurality of interconnects including a first interconnect coupled to a first voltage and a second interconnect coupled to a second voltage.

Abstract: A device is provided, including a package substrate including at least one opening extending through the package substrate, and an interconnect structure including a first segment and a second segment. The first segment may extend under a bottom surface of the package substrate and may further extend beyond a footprint of the package substrate. The second segment may extend vertically from the first segment and may extend at least partially through the at least one opening of the package substrate.

Abstract: Semiconductor packages, and methods for making the semiconductor packages, having an interposer structure with one or more interposer and an extension platform, which has an opening for placing the interposer, and the space between the interposer and the extension platform is filled with a polymeric material to form a unitary interposer-extension platform composite structure. A stacked structure may be formed by at least a first semiconductor chip coupled to the interposer and at least a second semiconductor chip coupled to the extension platform, and at least one bridge extending over the space that electrically couples the extension platform and the interposer. The extension platform may include a recess step section that may accommodate a plurality of passive devices to reduced power delivery inductance loop for the high-density 2.5D and 3D stacked packaging applications.

Abstract: To address the issue of shrinking volume that can be allocated for electrical components, a system can use an interposer with a flexible portion. A first portion of the interposer can electrically connect to a top side of a motherboard. A flexible portion of the interposer, adjacent to the first portion, can wrap around an edge of the motherboard. A peripheral portion of the interposer, adjacent to the flexible portion, can electrically connect to a bottom side of the motherboard. The peripheral portion can be flexible or rigid. The interposer can define a cavity that extends through the first portion of the interposer. A chip package can electrically connect to the first portion of the interposer. The chip package can be coupled to at least one electrical component that extends into the cavity when the chip package is connected to the interposer.

Abstract: The present disclosure is directed to semiconductor packages incorporating composite or hybrid bridges that include first and second interconnect bridges positioned on a substrate and a power corridor with a plurality of vertical channels positioned on the substrate between the first and second interconnect bridges, wherein the power corridor integrally joins the first interconnect bridge to the second interconnect bridge.

Abstract: The present disclosure is directed to an electronic assembly and method of forming thereof. The electronic assembly may include a substrate and a first die with first and second opposing surfaces. The first die may be coupled to the substrate at the first surface. At least one first trench may extend partially through the first die from the second surface. A stiffener may be attached to the substrate. The stiffener may have a cavity that accommodates the first die, in which the second surface of the first die faces the stiffener. A thermally conductive layer may be positioned between the stiffener and the first die. The conductive layer at least partially fills the at least one first trench.

Abstract: A method of correcting bonding coordinates according to locations of a die and leads loaded for bonding is provided. The method includes searching for locations of die recognition areas and lead recognition areas, comparing the detected locations of the recognition areas, and correcting bonding coordinates of the die and the leads according to the result obtained by the comparison; and if a search for the locations of the die recognition areas fails, searching for reference bond pads, comparing locations of the detected reference bond pads with setting locations, and correcting bonding coordinates of a die and leads to be bonded according to the result obtained by the comparison.

Abstract: A method of correcting bonding coordinates according to locations of a die and leads loaded for bonding is provided. The method includes searching for locations of die recognition areas and lead recognition areas, comparing the detected locations of the recognition areas, and correcting bonding coordinates of the die and the leads according to the result obtained by the comparison; and if a search for the locations of the die recognition areas fails, searching for reference bond pads, comparing locations of the detected reference bond pads with setting locations, and correcting bonding coordinates of a die and leads to be bonded according to the result obtained by the comparison.

Abstract: A multi-tank connecting device has a main tank with a fuel pump and one or more auxiliary tanks. A fuel pipe connects the main tank and the auxiliary tank and allows fuel to flow between the main tank and the auxiliary tank. A fuel isolating device closes the fuel pipe when the vehicle ascends or descends a slope. The auxiliary tank is disposed lower than the main tank. The fuel isolating device includes a ball, a panel attached to a rod, a spring attached to the panel, a switch, a throttle valve actuator, and a throttle valve.

Abstract: In an automatic time setting method of an asynchronous mobile communication terminal, when a user moves from a first area to a second area in a GSM/GPRS network, a time difference between the two areas is calculated by using LAIs or RAIs of the first and second areas, and a time of the terminal is reset according to the calculated time difference. The asynchronous mobile communication terminal includes a RTC (real time clock) circuit for generating time information; a memory for storing time difference information between areas; and a CPU for reading a time difference corresponding to area information of a first and a second areas from the memory when a user moves from the first area to the second area and controlling the RTC circuit.

Abstract: A multi-bombe connecting device has a main bombe with a fuel pump and one or more auxiliary bombes. A fuel pipe connects the main bombe and the auxiliary bombe and allows fuel to flow between the main bombe and the auxiliary bombe. A fuel isolating device closes the fuel pipe when the vehicle ascends or descends a slope. The auxiliary bombe is disposed lower than the main bombe. The fuel isolating device includes a ball, a panel attached to a rod, a spring attached to the panel, a switch, a throttle valve actuator, and a throttle valve.

Abstract: In an automatic time setting method of an asynchronous mobile communication terminal, when a user moves from a first area to a second area in a GSM/GPRS network, a time difference between the two areas is calculated by using LAIs or RAIs of the first and second areas, and a time of the terminal is reset according to the calculated time difference. The asynchronous mobile communication terminal includes a RTC (real time clock) circuit for generating time information; a memory for storing time difference information between areas; and a CPU for reading a time difference corresponding to area information of a first and a second areas from the memory when a user moves from the first area to the second area and controlling the RTC circuit.