Abstract: An apparatus and a method for controlling a coasting operation in a hybrid vehicle are provided. The apparatus includes: a coasting operation control mode entrance time point determination unit to determine a time point at which a subject vehicle enters a coasting operation control mode; a target vehicle speed reach time point calculation unit to calculate a target vehicle speed of the subject vehicle and a time point, at which the subject vehicle reaches the target vehicle speed, when the subject vehicle enters the coasting operation control mode; and a creep torque variation control unit to control creep torque of the subject vehicle using a difference between the target vehicle speed and a present vehicle speed of the subject vehicle.

Abstract: An inverter for driving a motor of a vehicle mediating between a battery and a driving motor is disclosed. The inverter includes a power storage module, a power module, and a cooling module. The power storage module is configured to be supplied with power from the battery. The power module is configured to be supplied with power from the power storage module to transfer the power to the driving motor. The cooling module is configured to be installed between the power storage module and the power module to simultaneously cool the power storage module and the power module.

Abstract: A method of blow molding an article having at least one layer of thermoplastic material. The method comprises the steps of heating a mold having an inner surface with two or more areas of different surface textures to a first temperature of greater than 55° C. and subsequently feeding a parison into the mold. The parison is then blown against the inner surface of the mold to form an article. The temperature of the mold is subsequently lowered to a second temperature of between 20° C. to about 55° C. and the temperature cycle time (tct) of the mold is less than 250 seconds. Using the two phase heating and cooling process in combination with a mold featuring different surface textures provides a finished article with different visual effects.

Abstract: Disclosed are personality testing device and method. A personality testing device, according to an embodiment of the present invention, comprises: an input and output unit for providing test questions which comprise a stimulation word and obtaining a response word which is a response received from a person to be tested with respect to the stimulation word; and a control unit for forming the test questions by extracting a stimulation word from a word graph that is classified by personality types and for distinguishing the personality type of the person to be tested by analyzing the response word by means of the word graph.

Abstract: A voltage regulation circuit includes a voltage regulator that is configured to provide a stable output voltage based on an input voltage; and a control circuit, coupled to the voltage regulator, and configured to provide an injection current to maintain the stable output voltage in response to an enable signal provided at an input of the control circuit transitioning to a predetermined state and cease providing the injection current when the control circuit detects that a voltage level of the output voltage is higher than a pre-defined voltage level.

Abstract: During the manufacture of a semiconductor package, a semiconductor wafer including a plurality of bond pads on a surface of the wafer is provided and the surface of the wafer is covered with a dielectric material to form a dielectric layer over the bond pads. Portions of the dielectric layer corresponding to positions of the bond pads are removed to form a plurality of wells, wherein each well is configured to form a through-hole between top and bottom surfaces of the dielectric layer for exposing each bond pad. A conductive material is then deposited into the wells to form a conductive layer between the bond pads and a top surface of the dielectric layer. Thereafter, the semiconductor wafer is singulated to form a plurality of semiconductor packages.

Abstract: A method of manufacturing a semiconductor device comprises forming a spacer material on the semiconductor fin and the gate stack, wherein the forming the spacer material further comprises using atomic layer deposition to deposit a first material on the semiconductor fin and using atomic layer deposition to deposit a second material on the first material, wherein the second material is different from the first material. The spacer material is removed from the semiconductor fin, wherein the removing the spacer material further comprises implanting an etching modifier into the spacer material to form a modified spacer material and removing the modified spacer material.

Abstract: An embodiment method includes forming a patterned etch mask over a target layer and patterning the target layer using the patterned etch mask as a mask to form a patterned target layer. The method further includes performing a first cleaning process on the patterned etch mask and the patterned target layer, the first cleaning process including a first solution. The method additionally includes performing a second cleaning process to remove the patterned etch mask and form an exposed patterned target layer, the second cleaning process including a second solution. The method also includes performing a third cleaning process on the exposed patterned target layer, and performing a fourth cleaning process on the exposed patterned target layer, the fourth cleaning process comprising the first solution.

Abstract: A method of manufacturing a semiconductor structure includes depositing a silicon layer over a substrate, removing a portion of the silicon layer to form a gate stack, and performing a hydrogen treatment on the gate stack to repair a plurality of voids in the stack structure.

Abstract: A method of fabricating a photomask includes depositing a phase shifter over a light transmitting substrate, depositing a shading layer over the light transmitting substrate, and removing a portion of the shading layer and a portion of the phase shifter to expose a portion of the light transmitting substrate. The phase shifter having at least two semiconductor layers and at least two dielectric layers.

Abstract: A semiconductor device includes a substrate with an upper surface and a lower surface, and first to third active patterns extending from the upper surface of the substrate. The first to third active patterns are arranged adjacent to each other in a first direction. The second active pattern is disposed between the first and third active patterns. The semiconductor device also includes a first gate electrode surrounding side surfaces of the first and second active patterns, and a second gate electrode surrounding side surfaces of the third active pattern. Each of the first to third active patterns includes a first impurity region, a channel region, and a second impurity region.

Abstract: A conductive structure includes a substrate including a first dielectric layer formed thereon, at least a first opening formed in the first dielectric layer, a low resistive layer formed in the opening, and a first metal bulk formed on the lower resistive layer in the opening. The first metal bulk directly contacts a surface of the first low resistive layer. The low resistive layer includes a carbonitride of a first metal material, and the first metal bulk includes the first metal material.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate having a first surface, a second surface opposing the first surface, and sidewalls defining a recess that passes through the semiconductor substrate. A first interconnect layer is within a first dielectric structure disposed along the second surface, and a bonding pad is in the recess and extends to the first interconnect layer. A dielectric filling layer is also within the recess. The dielectric filling layer has an opening over a portion of the bonding pad and a curved upper surface over the bonding pad. A nickel layer is over the bonding pad and in the opening.

Abstract: A method of manufacturing a semiconductor device includes depositing a first passivation layer over a substrate, depositing a conductive material over the first passivation layer, patterning the conductive material to form a redistribution layer (RDL) structure, and depositing a second passivation layer configured to change a shape of a top portion of the RDL structure.

Abstract: Provided is a microwave rice cooker, comprising a cavity structure, a door assembly and an inner pot (20). The cavity structure comprises a microwave transmitting mechanism, a cavity (2) provided with a cylindrical cooking chamber therein, and a top cap (1) and a bottom cap (5) located at two ends of the cooking chamber respectively. The bottom cap (5) closes the cooking chamber at the bottom. A top opening of the cooking chamber is formed on the top cap (1). The inner pot (20) can be put into or taken out of the cooking chamber through the top opening. The door assembly is mounted on the top cap (1) in an openable and closable manner so as to open or close the cooking chamber from the top. The microwave transmitting mechanism is mounted at the bottom of the bottom cap (5) to feed microwaves into the cooking chamber from the bottom. The microwave rice cooker achieves a two-in-one function of a microwave oven and a rice cooker.

Abstract: A semiconductor device and method of manufacture comprise placing an etch stop layer of a material such as aluminum oxide over a conductive element, placing a dielectric layer over the etch stop layer, and placing a hardmask of a material such as titanium nitride over the dielectric layer. Openings are formed to the etch stop layer, the hardmask material is selectively removed, and the openings are then the material of the etch stop layer is then selectively removed to extend the openings through the etch stop layer.

Abstract: A planarization method includes forming a dielectric layer over a polish stop layer. The dielectric layer is polished until reaching the polish stop layer, and the polished dielectric layer has a concave top surface. A compensation layer is formed over the concave top surface. The compensation layer is polished.

Abstract: A method of manufacturing a semiconductor device includes providing a material above a substrate and respectively forming separate gate electrode lines on opposite sidewalls of the material. As such, a width of cut between the gate electrode lines can be minimized. This shortens a height of cell of the semiconductor device, increasing a cell density of the semiconductor device.

Abstract: A finFET device and methods of forming a finFET device are provided. The method includes forming a first gate spacer is formed over a dummy gate of a fin field effect transistor (finFET). The method also includes performing a carbon plasma doping of the first gate spacer. The method also includes forming a plurality of source/drain regions, where a source/drain region is disposed on opposite sides of the dummy gate. The method also includes removing dummy gate.

Abstract: A display device and a method for preparing the same are disclosed. The display device includes a display panel and a backlight module. The backlight module is located below the display panel and includes a back plate, a first adhesive layer, a light emitting module and a reflector. The first adhesive layer is disposed on the back plate and the first adhesive layer includes a first area and a second area. The first area is adjacent to the second area. The light emitting module includes a light emitting unit and a print circuit board. The light emitting unit and the print circuit board are electrically connected, and the print circuit board is disposed in the first area of the first adhesive layer. A part of the reflector is disposed in the second area of the first adhesive layer.