Abstract: A method of fabricating a semiconductor device includes receiving a device substrate; forming an interconnect structure on a front side of the device substrate; and etching a recess into a backside of the device substrate until a portion of the interconnect structure is exposed. The recess has a recess depth and an edge of the recess is defined by a sidewall of the device substrate. A conductive bond pad is formed in the recess, and a first plurality of layers cover the conductive bond pad, extend along the sidewall of the device substrate, and cover the backside of the device substrate. The first plurality of layers collectively have a first total thickness that is less than the recess depth. A first chemical mechanical planarization is performed to remove portions of the first plurality of layers so remaining portions of the first plurality of layers cover the conductive bond pad.

Abstract: A direct water-cooling battery cell is capable of directly cooling heat generated in a battery cell by using non-insulated low-cost general cooling water, rather than insulated. expensive special cooling water. A direct water-cooling battery module comprising a plurality of the direct water-cooling battery cells is also provided.

Abstract: A semiconductor structure including a pillar structure and a spacer structure is provided. The pillar structure is disposed over a substrate, and comprises: a lower layer, disposed on the substrate; an upper layer, disposed over the lower layer; and a dielectric layer, disposed between the lower layer and the upper layer, wherein the upper layer includes a first portion and a second portion disposed below and connecting the first portion. The spacer structure laterally surrounds the pillar structure, and comprises: an upper portion, surrounding the first portion of the upper layer; and a lower portion, disposed below and connecting the upper portion, wherein a first thickness of the upper portion is substantially greater than a second thickness of the lower portion. A method for manufacturing a semiconductor structure is also provided.

Abstract: The present invention relates to a rapid diagnostic kit reader including a measurement module into which a rapid diagnostic kit is inserted and a smart terminal that is seated on the measurement module, photographs a membrane of the rapid diagnostic kit inserted into the measurement module, analyzes an image captured by photographing the membrane, and determines a diagnosis result of the rapid diagnostic kit.

Abstract: A vacuum breaker valve includes a valve body and a vacuum breaking device mounted in the valve body. The valve body has a periphery provided with multiple air vent holes corresponding to the vacuum breaking device. The vacuum breaking device includes a mounting barrel, an elastic member, a braking member, a mounting plate, a water stop gasket, and a water inlet disk. The vacuum breaking device is assembled previously and then directly fitted into the valve body to construct the vacuum breaker valve. Thus, the vacuum breaking device and the valve body are combined together for a whole sale or the vacuum breaking device and the valve body are sold individually.

Abstract: A method for determining a probability of a kidney stone in a subject being a uric-acid (UA) stone includes steps of: establishing, by using a machine learning algorithm, a prediction model based on a plurality of training data sets that are related to a plurality of patients, each of the plurality of training data sets at least including an estimated glomerular filtration rate (eGFR) and a value of urine pH; and feeding an input variable set into the prediction model so as to obtain the probability of the kidney stone in the subject being a UA stone. The input variable set is related to the subject and including an eGFR and a value of urine pH of the subject.

Abstract: The disclosure provides for compositions and methods comprising cell-derived vesicles induced from cells that have been genetically engineered or infected to express specific antigen(s), and uses thereof, including as a cell-free, cell-like vaccine.

Abstract: The present invention provides a heat dissipative semiconductor package. The semiconductor package includes a package body in a flat rectangular shape. The semiconductor package further includes a die, a conductive block, multiple metal blocks, a molding layer, and a redistribution layer. A first contact of the die is electrically connected to a first pin. A second contact of the die is electrically connected to a second pin via the redistribution layer and the conductive block. The first pin and the second pin are respectively exposed from the bottom surface of the package body to curve, extend, and cover different side surfaces of the package body. The conductive block and the metal blocks are formed by dicing a same VCB. Heat generated by the die can be effectively dissipated externally through the first pin, the second pin, and the conductive block, and thus cooling the die.

Abstract: A method for fabricating semiconductor device includes the steps of forming an inter-metal dielectric (IMD) layer on a substrate, forming a trench in the IMD layer, forming a synthetic antiferromagnetic (SAF) layer in the trench, forming a metal layer on the SAF layer, planarizing the metal layer and the SAF layer to form a metal interconnection, and forming a magnetic tunneling junction (MTJ) on the metal interconnection.

Abstract: An emission driving circuit comprises a pull-up circuit configured to output a first power voltage as an emission signal in response to a voltage of a pull-up control node, a first pull-down control circuit configured to control a voltage of a pull-down control node in response to the voltage of the pull-up control node, and a pull-down circuit configured to output a second power voltage as the emission signal in response to the voltage of the pull-down control node, wherein the first pull-down control circuit comprises a first transistor and a second transistor which are electrically connected in series.

Abstract: The digital suture devices can accurately record electrical activity in muscles, while reducing both tissue damage and increasing ease of use. In some examples, the digital suture device can include an adapter configured to be connected to a data collection and/or stimulus control system. The device can further include a sensor body electrically and mechanically connected to the adapter. The sensor body may include one or more sensor members extending from the adapter. Each sensor member may include a first section distal to the adapter, a second section including one or more arrays of one or more stimulating/sensing sites, and a third section configured to be used with a delivery device. The second section may be disposed between the first section and the third section. Each sensor member may include one or more sets of tissue engaging members disposed along a length of the second section.

Abstract: This document describes systems and techniques directed at a machine-learning-based greedy optimization mechanism for reducing radio-frequency (RF) tests in production. In aspects, a process capability index is disclosed, the process capability index used to refine a test-set. The test-set includes tests configured to be performed on an electronic device. The process capability index is configured based on upper specification limits and lower specification limits of the electronic device for each test in the test-set, as well as results for each of the tests in the test-set. The process capability index is further configured based on a new upper specification limit and a new lower specification limit of the electronic device for a new test not in the test-set, as well as results for the new test.

Abstract: An extreme ultraviolet (EUV) lithography system includes a vane bucket module. The vane bucket module includes a temperature adjusting pack and a collecting tank inserted into the temperature adjusting pack. The temperature adjusting pack has a plurality of inlets. The collecting tank has a cover and the cover includes a plurality of through holes. The inlets of the temperature adjusting pack are aligned with the through holes of the cover. Each through hole has a minimum depth at a first position and a maximum depth at a second position. The first position is closer to a center of the cover than the second position.

Abstract: In one example, an electronic assembly comprises a first semiconductor device and a second semiconductor device. Each of the first semiconductor device and the second semiconductor devices comprises a substrate comprising a top surface and a conductive structure, an electronic component over the top surface of the substrate, a dielectric material over the top surface of the substrate and contacting a side of the electronic component, a substrate tab at an end of substrate and not covered by the dielectric material, wherein the conductive structure of the substrate is exposed at the substrate tab, and an interconnect electrically coupled to the conductive structure at the substrate tab of the first semiconductor device and the conductive structure at the substrate tab of the second semiconductor device. Other examples and related methods are also disclosed herein.

Abstract: A light-emitting diode includes a current-blocking layer disposed on a second semiconductor layer of a semiconductor stacking layer and including a strip-shaped part, a transparent conducting layer disposed on the second semiconductor layer and covering the current-blocking layer, a first electrode disposed on a first semiconductor layer of the semiconductor stacking layer, and a second electrode disposed on the transparent conducting layer and including a second electrode pad and a second electrode extension part. As viewed from a top of the light-emitting diode towards the semiconductor stacking layer, a first side of the strip-shaped part defines a first distance from a side of the second electrode extension part facing towards the first side, and a second side of the strip-shaped part defines a second distance from a side of the second electrode extension part facing towards the second side, and the first distance is greater than the second distance.

Abstract: A method for training a segmentation model is provided. The method includes using first training images to train a segmentation model. The method includes using second training images to train an image generator. The method includes inputting real images into the segmentation model to generate predicted annotation images. The method includes inputting the predicted annotation images into the image generator to generate fake images. The method includes updating the segmentation model and the image generator according to a loss caused by differences between the real images and the fake images.

Abstract: A removable structure includes a barrel and a simulated structure disposed on the barrel. The simulated structure includes a muzzle, a sleeve base, a removable base, a knob member, an engaging assembly and an elastic fixing assembly. The knob member has a pivoting portion pivoted in the removable base. The pivoting portion has a cam structure. The cam structure has a pressing face and a retracting face. When the pressing face corresponds to the elastic fixing assembly by the pivoting portion rotating in the removable base, the elastic fixing assembly is pressed by the pressing face to be fixed on the barrel. When the retracting face corresponds to the elastic fixing assembly by the pivoting portion rotating in the removable base, the elastic fixing assembly abuts against the retracting face to separate from the barrel.

Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes a first interconnect dielectric layer over a substrate and surrounding a first interconnect. A second interconnect dielectric layer is over the first interconnect dielectric layer and surrounds at least a part of a second interconnect. A bottom electrode is over the substrate, a top electrode is over the bottom electrode, and a ferroelectric layer is between the bottom electrode and the top electrode. The ferroelectric layer includes a lower horizontally extending portion, an upper horizontally extending portion arranged above the lower horizontally extending portion, and a vertically extending portion coupling the lower horizontally extending portion and the upper horizontally extending portion. The vertically extending portion extends through the first interconnect dielectric layer and the second interconnect dielectric layer.

Abstract: A memory device includes RRAM memory cells configured to form a zero-transistor and one-resistor (0T1R) array structure in which access transistors of the RRAM memory cells are bypassed or removed. Alternatively, the access transistors of the RRAM memory cells may be arranged in a parallel structure to reduce associated IR drop and thus enable reduced write voltage operation.

Abstract: A method for converting alkanes to olefins includes contacting a feed stream comprising alkanes with an oxidative dehydrogenation that does not comprise tellurium catalyst in a reaction zone and dehydrogenating the alkanes without a co-feed of oxygen to yield a product stream having olefins. The oxidative dehydrogenation catalyst has the formula: MovVwNbyAzOx, where v is 1.0, w is from 0.1 to 0.5, y is from 0.001 to 0.3, A is Bi, Sb, Pr, or mixtures thereof, z is from 0.01 to 0.3, and x charge-balances the structure. The oxidative dehydrogenation catalyst has a crystallographic structure with Pba2-32 space group, characterized by reflections determined with Cu-K? X-ray diffraction (XRD) as follows.