Abstract: A data storage device may include a plurality of system resources, a buffer memory device and a memory controller. The buffer memory device may include a buffer memory allotted to the system resources. The memory controller may allocate the buffer memory based on performance requirements that are set in each of the system resources.

Abstract: The present technology relates to an electronic device. According to the present technology, a memory controller may include a latency monitor and an operation controller. The latency monitor may count an over-latency count value representing a number of over-latencies exceeding a reference value among latencies for requests from a host during each of a plurality of periods, calculate gaps which are difference values between the over-latency count values of the plurality of periods, and generate latency information including the over-latency count values and the gaps. The operation controller may determine, based on the latency info oration, whether each gap between at least two target periods among the plurality of periods exceeds a threshold value, and delay a response to the requests according to a determination result.

Abstract: A memory controller that controls a memory device including a plurality of memory blocks allocated to a plurality of zones for storing data is provided. The memory controller comprises a plurality of processing cores controlling data operations in the plurality of zones in the memory device; and an external interface unit in communication with an external device and configured to receive, from the external device, a write request requesting to perform a write operation on a first zone in the memory device, the external interface unit configured to identify a first processing core for controlling the first zone and determine a second core to perform the write operation based on a number of open zones controlled by the first core and having an open state indicating a capability to execute a program operation.

Abstract: A memory system may include a memory device including a plurality of memory areas each configured by a plurality of memory blocks; and a memory controller configured to generate zones each including at least one memory block selected from at least one of the memory areas included in the memory device, manage configuration information for each generated zone, sequentially store data from a first storage location of an open zone among the generated zones during a write operation on the open zone according to an external request, and determine a number of active target memory areas associated with the open zone on a basis of configuration information of the open zone.

Abstract: A memory controller that controls a memory device including a plurality of memory blocks allocated to a plurality of zones for storing data is provided. The memory controller comprises a plurality of processing cores controlling data operations in the plurality of zones in the memory device; and an external interface unit in communication with an external device and configured to receive, from the external device, a write request requesting to perform a write operation on a first zone in the memory device, the external interface unit configured to identify a first processing core for controlling the first zone and determine a second core to perform the write operation based on a number of open zones controlled by the first core and having an open state indicating a capability to execute a program operation.

Abstract: Disclosed is an electronic device. The electronic device according to an embodiment may include an ultrasonic sensor and a processor electrically connected to the ultrasonic sensor. The processor may be configured to obtain a noise signal at a periphery of the electronic device, via the ultrasonic sensor, to determine an attribute of a first ultrasonic signal oscillated by the ultrasonic sensor, based on the obtained noise signal, and to obtain fingerprint information based on the second ultrasonic signal obtained via the ultrasonic sensor and the determined attribute. Moreover, various embodiment found through the disclosure are possible.

Abstract: The present disclosure relates to an electronic device, and more particularly, to a memory controller and a storage device including the same. According to an embodiment, a memory controller includes a storage configured to store first defect information corresponding to a non-repairable defect and second defect information corresponding to a repairable defect, an output circuit configured to detect a defect in the memory controller and to output the first or second defect information as defect information corresponding to a detected defect, and logic configured to check a type of the detected defect based on the second defect information when the defect information corresponds to the second defect information and to perform a recovery operation according to the type of the detected defect.

Abstract: There are provided a controller and a memory system having the controller.

Abstract: A welding method includes: forming one or more lower plate grooves having a predetermined width and a predetermined depth at one side of an upper surface of a lower plate; forming one or more upper plate grooves having a predetermined width and a predetermined depth at one side of a lower surface of an upper plate; overlapping the lower plate and the upper plate so that the lower plate grooves of the lower plate and the upper plate grooves of the upper plate mesh with one another; and performing welding to form a bead at a welding part.

Abstract: There are provided a controller and a memory system having the controller. The controller includes: a first storage area configured to store mapping information between logical addresses of logical regions of a storage device coupled to the controller and physical addresses of memory blocks of the storage device, the logical regions being divided into logical units including a first logical unit; and a second storage area configured to store allocation information on logical addresses of logical regions allocated to the first logical unit, each of the logical regions allocated to the first logical unit having a corresponding index, wherein the second storage area is further configured to store a location table including index information on a smallest index among indices corresponding to the logical regions allocated to the first logical unit and number information on a total number of the logical regions allocated to the first logical unit.

Abstract: An electronic device is provided. The electronic device includes a transparent member, a display positioned under a transparent member that includes a plurality of pixels, an image sensor positioned under some areas of the display, a memory, and a processor. The processor obtains a first image at least based on light output through at least some of the plurality of pixels and reflected by an external object coming into contact with the transparent member using the image sensor, performs authentication on the external object at least based on the at least one template using the first image, generates a second image of the external object at least based on the first image when quality of the first image corresponds to a given condition based on a result of the authentication, and performs authentication on the external object at least based on the at least one template using the second image.

Abstract: A data storage device may include: a memory device; and a controller configured to control an operation of the memory device. The controller may include a first CPU and a second CPU including a plurality of cores, wherein the first CPU compares P/E (Program/Erase) average counts for the plurality of cores of the second CPU, and performs a remapping operation of changing a core which is mapped to logical block addresses received from a host.

Abstract: A memory system includes a memory device including dies, each of the dies including planes, each of the planes including blocks, each of the blocks including pages; and a controller suitable for controlling the memory device, the controller comprising: a memory including a mapping table which includes map chunks generated through dividing map data into map chunks each of a unit size; a pattern determination engine suitable for determining patterns with respect to each of the map chunks received from the memory; and a compression engine suitable for determining whether to perform compression on the map chunks, based on pattern determination results for the map chunks determined by the pattern determination engine, and performing compression on those map chunks for which performing compression was determined.

Abstract: An electronic device comprising a biosensor is disclosed. The electronic device comprises: the biosensor for acquiring bio-information related to a user; light-emitting circuitry comprising a first light source for outputting light including a designated band; a display panel comprising a second light source for outputting light including one or more pixels; and a processor, wherein the processor can check situation information related to the user, select the corresponding first light source and/or second light source on the basis of the situation information, and acquire the bio-information through the biosensor by using the selected at least one light source.

Abstract: An electronic device is provided. The electronic device includes a display including a touch sensor and a display panel, a fingerprint sensor included in the display or disposed on a rear surface of the display, and at least one processor electrically connected with the display and the fingerprint sensor. The at least one processor controls an operation of the touch sensor or lowers a frequency of an operating signal of the touch sensor in response to a specified event, activates the fingerprint sensor, and captures a fingerprint image from the fingerprint sensor.

Abstract: An electronic device and method are disclosed herein. The electronic device includes a display, a fingerprint recognition sensor configured to recognize a fingerprint received through the display, and a processor. The processor is configured to implement the method, which includes detecting a fingerprint using a fingerprint recognition sensor of the electronic device through a display of the electronic device; and controlling the display to display at least one object based on the fingerprint.

Abstract: Provided herein may be a storage system and a method of operating the same. The method of operating the storage system may include outputting, by a host system, a command for reading address mapping data, pieces of which correspond to first to (n?1)-th memory systems, the address mapping data being stored in an n-th memory system, where n is a natural number of 3 or more, outputting, in a first transmission operation, the address mapping data from the n-th memory system and inputting the address mapping data to the host system in response to the command, and outputting, in a second transmission operation, the address mapping data from the host system and inputting the address mapping data to the first to (n?1)-th memory systems.

Abstract: Disclosed is an electronic device including a display, a touch recognition sensor that recognizes a touch input on the display; a fingerprint recognition sensor that recognizes a fingerprint input on the display, and a processor coupled to the display, the touch recognition sensor, and the fingerprint recognition sensor, wherein the processor is configured to activate the touch recognition sensor, display at least one user interface that receives the fingerprint input on a fingerprint recognition area of the display, activate at least a portion of the fingerprint recognition sensor, and selectively deactivate a portion of the touch recognition sensor corresponding to the activated portion of the fingerprint recognition sensor.

Abstract: A data storage device may include: a memory device; and a controller configured to control an operation of the memory device. The controller may include a first CPU and a second CPU including a plurality of cores, wherein the first CPU compares P/E (Program/Erase) average counts for the plurality of cores of the second CPU, and performs a remapping operation of changing a core which is mapped to logical block addresses received from a host.

Abstract: An electronic device and method are disclosed herein. The electronic device includes a display, a fingerprint recognition sensor configured to recognize a fingerprint received through the display, and a processor. The processor is configured to implement the method, which includes detecting a fingerprint using a fingerprint recognition sensor of the electronic device through a display of the electronic device; and controlling the display to display at least one object based on the fingerprint.