Abstract: A semiconductor package includes; a semiconductor substrate including a device region and an edge region, a first redistribution layer on a lower surface of the semiconductor substrate, a second redistribution layer on an upper surface of the semiconductor substrate, through vias vertically penetrating the semiconductor substrate in the edge region to electrically connect the first redistribution layer and the second redistribution layer, and a circuit layer between the lower surface of the semiconductor substrate and the first redistribution layer. The circuit layer may include; a circuit element on the lower surface of the semiconductor substrate, a circuit wiring pattern electrically connected to the circuit element and the first redistribution layer, and a device interlayer dielectric layer substantially encompassing the circuit element and the circuit wiring pattern, wherein the circuit element and the circuit wiring pattern are disposed in the device region and not in the edge region.

Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.

Abstract: A vacuum blender having a foreign body catching member mounted thereon, the foreign body catching member disposed outside a container cover such that one end is communicatably coupled to a discharge hole formed in the container cover, and the other end is communicatably coupled to a communication path enabling a vacuum pump to communicate with the container cover. When the vacuum pump is operated in a state where the two ends of the foreign body catching member are communicating with the discharge hole and the communication path, respectively, air inside a crushing container is discharged to the outside by passing through the vacuum pump via the discharge hole, the foreign body catching member, and the communication path, and, by means of moving relative to the container cover, the foreign body catching member disposed outside the container cover has the one end communicate with or be blocked from the discharge hole.

Abstract: A semiconductor package includes a package substrate, an interposer substrate on the package substrate, first connection bumps between the package substrate and the interposer substrate, first and second semiconductor chips on the interposer substrate, second connection bumps between the interposer substrate and the first and second semiconductor chips, and an upper molding layer on the interposer substrate and at least partially surrounding the first semiconductor chip and the second semiconductor chip. The interposer substrate includes a plurality of sub-interposers horizontally spaced apart from each other and each including through electrodes, a lower molding layer in a space between the sub-interposers, and a redistribution layer electrically connected to the through electrodes on the sub-interposers and the lower molding layer. A sum of areas of the sub-interposers is less than a sum of areas of the first and second semiconductor chips.

Abstract: A semiconductor package includes a first semiconductor chip having a first top surface and an opposite first bottom surface, first pads on the first top surface, each having a first width and a first height, second pads on the first top surface further outward from a center of the first semiconductor chip, each having a second width less than the first width and a second height greater than the first height. The semiconductor package further includes a second semiconductor chip having a second bottom surface which faces the first top surface and an opposite second top surface, third pads on the second bottom surface which are connected to the first pads, and fourth pads on the second bottom surface which are connected to the second pads. The second bottom surface is convex.

Abstract: A fabricating method for a test element group is provided. The fabricating method for a test element group includes fabricating test areas generated in a scribe lane area, wherein fabricating of the test areas includes forming a plurality of fins protruding in a first direction on a substrate, covering at least some of the plurality of fins with a masking material, and performing selective epitaxial growth by injecting a gas onto the plurality of fins. The gas is not injected onto the at least some of the plurality of fins that are covered with the masking material, such that the epitaxial growth does not occur on the fins covered with the masking material.

Abstract: A semiconductor package includes a first lower redistribution layer, a first upper redistribution layer over the first lower redistribution layer, a first semiconductor chip between the first lower redistribution layer and the first upper redistribution layer, a first connection post spaced apart from the first semiconductor chip and connecting the first lower redistribution layer to the first upper redistribution layer, a first interposition layer on the first upper redistribution layer, a second interposition layer on the first interposition layer, a second lower redistribution layer on the second interposition layer, a second upper redistribution layer over the second lower redistribution layer, a second semiconductor chip between the second lower redistribution layer and the second upper redistribution layer, and a second connection post spaced apart from each other and connecting the second lower redistribution layer to the second upper redistribution layer.

Abstract: The present disclosure relates to an electronic circuit. A circuit board according to the present disclosure includes a first conductor layer including a first pad for transmitting and receiving a first signal to and from an external device, a plurality of second conductor layers stacked on the first conductor layer, and a third conductor layer stacked on the plurality of second conductor layers for transmitting and receiving a second signal to and from the external device, wherein at least one target conductor layer among the plurality of second conductor layers has a mesh structure and is electrically grounded, and remaining second conductor layers except for the at least one target conductor layer include respective voids and are electrically opened.

Abstract: Provided is a personal authentication device based on an auditory brainstem response signal. The personal authentication device includes a signal generator, a signal acquirer, and a signal processor. The signal generator may output an auditory stimulus to an ear of a user, using a sound generator. The signal acquirer may acquire a first reference potential corresponding to a first interval, from a first electrode in close contact with the other ear of the user, and acquire a first evoked potential corresponding to the first interval from a second electrode in close contact with the ear, based on the first reference potential. The signal processor may generate a first auditory brainstem response signal, based on the first reference potential and the first evoked potential, generate authentication data for the user from the first auditory brainstem response signal, and compare the authentication data with registration data to authenticate the user.

Abstract: A device for automated loading and forming smoking articles has a pre-rolled cone holder holding a plurality of pre-rolled cones. A loading mechanism loads individual pre-rolled cones in the pre-rolled cone holder with a predefined amount of material. A filling mechanism deposits the predefined amount of material in the loading mechanism, the filling mechanism monitoring an amount of material loaded in the filling mechanism and sending a signal to stop loading the filling mechanism with the material when a predefined amount has been loaded. A dispensing mechanism sends the material to the filling mechanism. A hopper is in communication with the dispensing mechanism storing the material. A shaker is coupled to the hopper shaking the material in the hopper preventing the material from sticking together.

Abstract: Disclosed are a gas detection intelligence training system and an operating method thereof. The gas detection intelligence training system includes a mixing gas measuring device that collects an environmental gas from a surrounding environment, generates a mixing gas based on the collected environmental gas and a target gas, senses the mixing gas by using a first sensor array and a second sensor array under a first sensing condition and a second sensing condition, respectively, and generates measurement data based on the sensed results of the first sensor array and the second sensor array, and a detection intelligence training device including a processor that generates an ensemble prediction model based on the measurement data.

Abstract: Provided is a multi-port gas flow rate control apparatus. The multi-port gas flow rate control apparatus includes a gas supply chamber configured to supply a measurement gas input through one gas inflow channel while allowing the measurement gas to diverge into a plurality of flows, a plurality of gas divergence flow channels each having one side connected to the gas supply chamber and configured to transfer the measurement gas flowing through the gas supply chamber to a plurality of gas sensors, respectively, and a gas measurement chamber configured to accommodate the plurality of gas sensors, including the plurality of gas divergence flow channels configured to connect to the gas supply chamber to the plurality of gas sensors to transfer a gas outflow diverging through the gas supply chamber to the plurality of accommodated gas sensors, and configured to discharge the gas outflow sensed by the plurality of gas sensors.

Abstract: Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a package substrate, a redistribution layer on the package substrate, a vertical connection terminals that connects the package substrate to the redistribution layer, a first semiconductor chip between the package substrate and the redistribution layer, a first molding layer that fills a space between the package substrate and the redistribution layer, a second semiconductor chip on the redistribution layer, a third semiconductor chip on the second semiconductor chip, a first connection wire that directly and vertically connects the redistribution layer to a first chip pad of the third semiconductor chip, the first chip pad is beside the second semiconductor chip and on a bottom surface of the third semiconductor chip, and a second molding layer on the redistribution layer and covering the second semiconductor chip and the third semiconductor chip.

Abstract: A semiconductor package includes a first substrate, a first semiconductor chip disposed on the first substrate, a second substrate disposed on the first semiconductor chip, a second semiconductor chip disposed on the second substrate, and a mold layer disposed between the first substrate and the second substrate. The second substrate includes a recess formed at an edge, the mold layer fills the recess, and the recess protrudes concavely inward from the edge of the second substrate toward a center of the second substrate.

Abstract: A semiconductor package includes a first substrate including a first recess formed in a top surface of the first substrate, a first semiconductor chip disposed in the first recess and mounted on the first substrate, an interposer substrate disposed on the first semiconductor chip and including a second recess formed in a bottom surface of the interposer substrate, an adhesive layer disposed in the second recess and in contact with a top surface of the first semiconductor chip, a plurality of connection terminals spaced apart from the first recess and connecting the first substrate to the interposer substrate, and a molding layer disposed between the first substrate and the interposer substrate.

Abstract: The present invention discloses a thermal fatigue crack generator for a large pipe. According to the present invention, the thermal fatigue crack generator for a large pipe precisely manages and controls the heating and cooling conditions for the large size test pipes having a diameter of 250 to 610 mm to significantly improve the reliability of the accuracy and a reproducibility of the thermal fatigue cycle so that a useful advantage is expected to ensure the reliability and the effectiveness of the skill verification of the non-destructive testing.

Abstract: A semiconductor device includes a first fin type pattern in a first region of a substrate. The first fin type pattern includes a plurality of spaced-apart fins having respective sidewalls defined by a first trench. A first gate structure is provided, which intersects the first fin type pattern. A second fin type pattern is provided in a second region of a substrate. The second fin type pattern includes a fin having a sidewall defined by a second trench. A second gate structure is provided, which intersects the second fin type pattern. A field insulating film fills at least a part of the first trench and at least a part of the second trench.

Abstract: A bonding apparatus includes a body part; a vacuum hole disposed in the body part; a first protruding part protruding in a first direction from a first surface of the body part; a second protruding part protruding from the first surface of the body part in the first direction and spaced farther apart from a center of the first surface of the body part than the first protruding part in a second direction intersecting with the first direction; and a trench defined by the first surface of the body part and second surfaces of the first protruding part, the second surfaces protruding in the first direction from the first surface of the body part, and the trench being connected to the vacuum hole, wherein the second protruding part protrudes farther from the first surface of the body part in the first direction than the first protruding part.

Abstract: Disclosed are a device and a method for anomaly detection of a gas sensor. The device includes a measuring unit that extracts a characteristic of a gas supplied from the outside, generates data based on the extracted characteristic, and outputs the data, and a data processing unit that receives the data, determines whether an error occurs in the data, and outputs an anomaly detection result based on a result of determining whether the error occurs in the data. The measuring unit performs a calibration operation or an environment adjusting operation before extracting the characteristic, and the data processing unit determines whether the error occurs in the data, based on machine learning.

Abstract: A method and apparatus for predicting an object of interest of a user receives an input image of a visible region of a user and gaze information including a gaze sequence of the user, generates weight filters for a per-frame segmentation image by analyzing a frame of the input image for input characteristics of the per-frame segmentation image and the gaze information, and predicts an object of interest of the user by integrating the weight filters and applies the integrated weight filter to the per-frame segmentation image.