Patents by Inventor In Geun Lim
In Geun Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220076750Abstract: A memory device according to an embodiment of the present disclosure may include a string including a plurality of memory cells and a select transistor connected between a conductive line and the plurality of memory cells; a peripheral circuit configured to perform an erase operation of the string; and a control logic configured to control the peripheral circuit to increase a voltage level of an erase voltage applied to the conductive line for a first time period from time one to later time two at a first voltage-time slope, and increase the voltage level of the erase voltage for a second time period from time two to later time three at a second voltage-time slope, during the erase operation, wherein the second voltage-time slope is greater than the first voltage-time slope.Type: ApplicationFiled: March 11, 2021Publication date: March 10, 2022Applicant: SK hynix Inc.Inventors: Seong Ju PARK, Keun Woo LEE, In Geun LIM
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Patent number: 9601207Abstract: A semiconductor memory device is operated by, inter alia, performing least significant bit programs for pages in a first page group, performing least significant bit programs for pages in a second page group, and performing most significant bit programs for the pages in the first page group. The distance between the second page group and the common source line is greater than that between the first page group and the common source line.Type: GrantFiled: September 28, 2015Date of Patent: March 21, 2017Assignee: SK HYNIX INC.Inventors: Yong Dae Park, Eun Seok Choi, Jung Ryul Ahn, Se Hoon Kim, In Geun Lim, Jung Seok Oh
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Patent number: 9330773Abstract: A semiconductor memory device according to an embodiment of the present invention includes a first cell string and a second cell string coupled to a first word line group and a second word line group, respectively. An operating method of the semiconductor memory device may include forming a channel in the second cell string by applying a pass voltage to the second word line group, reflecting data of a selected memory cell coupled to a selected word line of the first word line group, among memory cells of the first cell string, on the channel of the second cell string through the bit line, and determining the data of the selected memory cell by sensing a quantity of electric charge of the second cell string through the bit line.Type: GrantFiled: December 16, 2014Date of Patent: May 3, 2016Assignee: SK Hynix Inc.Inventors: In Geun Lim, Min Kyu Lee
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Patent number: 9269443Abstract: A semiconductor device includes a memory block including even memory cells configured to form an even page and odd memory cells configured to form an odd page. The semiconductor device may also include an operation circuit configured to perform a program operation on the even memory cells and the odd memory cells. A first verify operation may separately verify the even memory cells and the odd memory cells, and a second verify operation may simultaneously verify the even memory cells and the odd memory cells. Further, the operation circuit may be configured to selectively perform the first verify operation and the second verify operation depending on a number of adjacent program fail cells in response to a verify result value.Type: GrantFiled: April 28, 2014Date of Patent: February 23, 2016Assignee: SK Hynix Inc.Inventors: In Geun Lim, Min Kyu Lee, Chi Wook An
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Publication number: 20160019966Abstract: A semiconductor memory device is operated by, inter alia, performing least significant bit programs for pages in a first page group, performing least significant bit programs for pages in a second page group, and performing most significant bit programs for the pages in the first page group. The distance between the second page group and the common source line is greater than that between the first page group and the common source line.Type: ApplicationFiled: September 28, 2015Publication date: January 21, 2016Inventors: Yong Dae PARK, Eun Seok CHOI, Jung Ryul AHN, Se Hoon KIM, In Geun LIM, Jung Seok OH
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Publication number: 20160019969Abstract: A semiconductor memory device according to an embodiment of the present invention includes a first cell string and a second cell string coupled to a first word line group and a second word line group, respectively. An operating method of the semiconductor memory device may include forming a channel in the second cell string by applying a pass voltage to the second word line group, reflecting data of a selected memory cell coupled to a selected word line of the first word line group, among memory cells of the first cell string, on the channel of the second cell string through the bit line, and determining the data of the selected memory cell by sensing a quantity of electric charge of the second cell string through the bit line.Type: ApplicationFiled: December 16, 2014Publication date: January 21, 2016Inventors: In Geun LIM, Min Kyu LEE
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Patent number: 9176873Abstract: A semiconductor memory device is operated by, inter alia, performing least significant bit programs for pages in a first page group, performing least significant bit programs for pages in a second page group, and performing most significant bit programs for the pages in the first page group. The distance between the second page group and the common source line is greater than that between the first page group and the common source line.Type: GrantFiled: December 19, 2012Date of Patent: November 3, 2015Assignee: SK Hynix Inc.Inventors: Yong Dae Park, Eun Seok Choi, Jung Ryul Ahn, Se Hoon Kim, In Geun Lim, Jung Seok Oh
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Publication number: 20150146488Abstract: A semiconductor device includes a memory block including even memory cells configured to form an even page and odd memory cells configured to form an odd page. The semiconductor device may also include an operation circuit configured to perform a program operation on the even memory cells and the odd memory cells. A first verify operation may separately verify the even memory cells and the odd memory cells, and a second verify operation may simultaneously verify the even memory cells and the odd memory cells. Further, the operation circuit may be configured to selectively perform the first verify operation and the second verify operation depending on a number of adjacent program fail cells in response to a verify result value.Type: ApplicationFiled: April 28, 2014Publication date: May 28, 2015Applicant: SK hynix Inc.Inventors: In Geun LIM, Min Kyu LEE, Chi Wook AN
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Patent number: 8743612Abstract: A three-dimensional (3-D) non-volatile memory device according to embodiment of the present invention includes a plurality of bit lines, at least one string row extending in a first direction coupled to the bit lines and including 2N strings, wherein the N includes a natural number, a common source selection line configured to control source selection transistors of the 2N strings included in a memory block, a first common drain selection line configured to control drain selection transistors of a first string and a 2N-th string among the 2N strings included in a memory block, and N?1 second common drain selection lines configured to control drain selection transistors of adjacent strings in the first direction among remaining strings other than the first string and the 2N-th string.Type: GrantFiled: September 6, 2012Date of Patent: June 3, 2014Assignee: SK Hynix Inc.Inventors: Eun Seok Choi, Jung Ryul Ahn, Se Hoon Kim, Yong Dae Park, In Geun Lim, Jung Seok Oh
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Publication number: 20140068222Abstract: A semiconductor memory device is operated by, inter alia, performing least significant bit programs for pages in a first page group, performing least significant bit programs for pages in a second page group, and performing most significant bit programs for the pages in the first page group. The distance between the second page group and the common source line is greater than that between the first page group and the common source line.Type: ApplicationFiled: December 19, 2012Publication date: March 6, 2014Applicant: SK HYNIX INC.Inventors: Yong Dae PARK, Eun Seok CHOI, Jung Ryul AHN, Se Hoon KIM, In Geun LIM, Jung Seok OH
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Publication number: 20130194869Abstract: A three-dimensional (3-D) non-volatile memory device according to embodiment of the present invention includes a plurality of bit lines, at least one string row extending in a first direction coupled to the bit lines and including 2N strings, wherein the N includes a natural number, a common source selection line configured to control source selection transistors of the 2N strings included in a memory block, a first common drain selection line configured to control drain selection transistors of a first string and a 2N-th string among the 2N strings included in a memory block, and N?1 second common drain selection lines configured to control drain selection transistors of adjacent strings in the first direction among remaining strings other than the first string and the 2N-th string.Type: ApplicationFiled: September 6, 2012Publication date: August 1, 2013Inventors: Eun Seok CHOI, Jung Ryul Ahn, Se Hoon Kim, Young Dae Park, In Geun Lim, Jung Seok Oh