Patents by Inventor In Hae CHOI

In Hae CHOI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9571503
    Abstract: A method and electronic device for network connection and authentication is disclosed herein. A control unit is configured to detect authentication information necessary to access a communication network, and detect whether the authentication information corresponding to the communication network is stored in a profile storing at least the authentication information for at least the communication network. A radio frequency (RF) processing unit configured to couple to the communication network in response to detecting that the authentication information is authenticated by an authentication server for the communication network.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: February 14, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Hae Choi, Chang-Yeon Yeo, Jong-Mu Choi
  • Publication number: 20160331708
    Abstract: The disclosure provides means and methods for increasing the activity of antibiotics. This enables the use of lower antibiotic dosages and the treatment of multidrug-resistant bacteria.
    Type: Application
    Filed: January 9, 2015
    Publication date: November 17, 2016
    Inventors: Hye Kyong Kim, Anne van der Meij, Robert Verpoorte, Young Hae Choi, Gilles Philippus van Wezel
  • Patent number: 9478151
    Abstract: Provided is an apparatus for a soil box experiment making a shape of a variable landslide surface. The apparatus for the soil box experiment making the shape of the variable landslide surface includes a soil box for realizing a slope on which landslide occurs, the soil box being inclinedly disposed and having an opened upper portion to accommodate soil therein, a base member disposed under the soil box to support the soil box, and a shape changing unit for changing a shape of a bottom surface of the soil box.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: October 25, 2016
    Assignee: KOREA INSTITUTE OF GEOSCIENCE AND MINERAL RESOURCES (KIGAM)
    Inventors: Jung-Hae Choi, Byung-Gon Chae, Pyeong-Koo Lee
  • Patent number: 9466609
    Abstract: The device includes plural control gates stacked on a substrate, plural first channels, configured to penetrate the control gates, and plural memory layer patterns, each located between the control gate and the first channel, configured to respectively surround the first channel, wherein the memory layer patterns are isolated from one another.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: October 11, 2016
    Assignee: SK Hynix Inc.
    Inventors: Min Soo Kim, Dong Sun Sheen, Young Jin Lee, Jin Hae Choi, Joo Hee Han, Sung Jin Whang
  • Patent number: 9441146
    Abstract: The invention is directed to a process for extracting materials from biological material, which process is characterized in that the naturally occurring biological material is treated with an extractant consisting of a deep eutectic solvent of natural origin or a an ionic liquid of natural origin to produce a biological extract of natural origin dissolved in the said solvent or ionic liquid.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: September 13, 2016
    Assignee: Universiteit Leiden
    Inventors: Jacob van Spronsen, Geert-Jan Witkamp, Frank Hollman, Young Hae Choi, Robert Verpoorte
  • Publication number: 20160197433
    Abstract: A waterproof receptacle connector includes: a plurality of contacts, a support plate for partially covering and protecting the contacts, an insulator on which the contacts are installed; and a shell for containing the insulator on which the contacts are installed, wherein the shell has upper, lower, left, and right surfaces processed with no holes or pores, except for a front surface portion through which a plug connector is inserted and a rear surface portion through which the insulator is inserted, and, after the insulator is inserted through the rear surface portion of the shell, an interruption portion may be formed on the rear surface.
    Type: Application
    Filed: August 6, 2014
    Publication date: July 7, 2016
    Inventors: Jung-Hoon CHOI, Kyung-Hae CHOI, Dong-Hee KIM
  • Patent number: 9368645
    Abstract: This technology relates to a nonvolatile memory device and a method of fabricating the same. The nonvolatile memory device may include a pipe connection gate electrode over a substrate, one or more pipe channel layers formed within the pipe connection gate electrode, pairs of main channel layers each coupled with the pipe channel layer and extended in a direction substantially perpendicular to the substrate, a plurality of interlayer insulating layers and a plurality of cell gate electrodes alternately stacked along the main channel layers, and etch stop layers including metal silicide and formed over the pipe connection gate electrode.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: June 14, 2016
    Assignee: SK Hynix Inc.
    Inventors: Min-Soo Kim, Young-Jin Lee, Jin-Hae Choi, Joo-Hee Han, Sung-Jin Whang, Byung-Ho Lee
  • Patent number: 9362304
    Abstract: This technology relates to a nonvolatile memory device and a method of fabricating the same. The nonvolatile memory device may include a pipe connection gate electrode configured to have a bottom buried in a groove formed in a substrate, one or more pipe channel layers formed within the pipe connection gate electrode, pairs of main channel layers each coupled to the pipe channel layer and extended in a direction substantially perpendicular to the substrate, and a plurality of interlayer insulating layers and a plurality of cell gate electrodes alternately stacked along the main channel layers, wherein the pipe connection gate electrode includes a metal silicide layer formed within the groove. The electric resistance of the pipe connection gate electrode may be greatly reduced without an increase in a substantial height by forming the metal silicide layer buried in the substrate under the pipe connection gate electrode.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: June 7, 2016
    Assignee: SK Hynix Inc.
    Inventors: Min-Soo Kim, Young-Jin Lee, Jin-Hae Choi, Joo-Hee Han, Sung-Jin Whang, Byung-Ho Lee
  • Publication number: 20160150537
    Abstract: An electronic device and a method of an electronic device are provided. The electronic device includes a receiver, and a processor configured to receive first proximity service data through the receiver, wherein the first proximity service data comprises guide information that contains information indicating a device for transmitting second proximity service data and a transmission time point of the second proximity service data. The method of an electronic device includes receiving first proximity service data, wherein the first proximity service data comprises guide information that contains information indicating a device for transmitting second proximity service data and a transmission time point of the second proximity service data.
    Type: Application
    Filed: November 25, 2015
    Publication date: May 26, 2016
    Inventors: Bu-Seop JUNG, Young-Kwan CHUNG, Dong-Il SON, Yong-Hae CHOI, Ju-Ho KIM, Christopher KANG, Hyuk KANG
  • Publication number: 20160150357
    Abstract: An electronic device and a method of transmitting information in an electronic device a provided. The electronic device includes a communication unit that includes a first communication module and a second communication module, wherein the second communication module supports a low-power and short-range communication method; and a processor controls collection of information through the first communication module, and to transmit information related to the collected information through the second communication module.
    Type: Application
    Filed: November 25, 2015
    Publication date: May 26, 2016
    Inventors: Bu-Seop JUNG, Young-Kwan CHUNG, Ki-Seok KANG, Hyuk KANG, Ju-Ho KIM, Dong-II SON, Yong-Hae CHOI, In-Young HWANG
  • Publication number: 20160061933
    Abstract: An apparatus is provided comprising: a communication interface; and at least one processor configured to: synchronize the apparatus with at least one electronic device, receive, via the communication interface, a signal from the electronic device, and determine a distance between the apparatus and the electronic device based on a transmission time and a reception time of the signal.
    Type: Application
    Filed: September 3, 2015
    Publication date: March 3, 2016
    Inventors: Young-Kwan CHUNG, Bu-Seop JUNG, Ki-Seok KANG, Ju-Ho KIM, Yong-Hae CHOI
  • Publication number: 20160037335
    Abstract: An electronic device is provided. The electronic device includes an information exchange control module configured to receive a first frame from an external electronic device before being connected to the external electronic device. If the first frame received from the external device includes identification information indicating a plurality of electronic devices connected to the external electronic device, transmit, to the external electronic device, a second frame including data information requested to be transmitted from each of the plurality of electronic devices.
    Type: Application
    Filed: August 4, 2015
    Publication date: February 4, 2016
    Inventors: Bu-Seop JUNG, Ki-Seok KANG, Young-Kwan CHUNG, Yong-Hae CHOI, Jong-Mu CHOI
  • Publication number: 20160029215
    Abstract: An electronic device includes a memory configured to store identification information of an information server that is matched with an encryption key; and a controller configured to send, before the electronic device is connected with an external device, a request for network information of the external device to the external device in a network discovery frame encrypted using the encryption key matched with the identification information of the information server, and to receive the network information of the external device from the external device in the encrypted network discovery frame.
    Type: Application
    Filed: July 22, 2015
    Publication date: January 28, 2016
    Inventors: Bu-Seop JUNG, Jun-Ho LEE, Young-Kwan CHUNG, Yong-Hae CHOI, Jong-Mu CHOI
  • Patent number: 9130052
    Abstract: This technology relates to a nonvolatile memory device and a method of fabricating the same. The nonvolatile memory device may include a pipe connection gate electrode over a substrate, one or more pipe channel layers formed within the pipe connection gate electrode, pairs of main channel layers each coupled with the pipe channel layer and extended in a direction substantially perpendicular to the substrate, a plurality of interlayer insulating layers and a plurality of cell gate electrodes alternately stacked along the main channel layers, and etch stop layers including metal silicide and formed over the pipe connection gate electrode.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: September 8, 2015
    Assignee: SK Hynix Inc.
    Inventors: Min-Soo Kim, Young-Jin Lee, Jin-Hae Choi, Joo-Hee Han, Sung-Jin Whang, Byung-Ho Lee
  • Patent number: 9130053
    Abstract: This technology relates to a nonvolatile memory device and a method of fabricating the same. The nonvolatile memory device may include a pipe connection gate electrode configured to have a bottom buried in a groove formed in a substrate, one or more pipe channel layers formed within the pipe connection gate electrode, pairs of main channel layers each coupled to the pipe channel layer and extended in a direction substantially perpendicular to the substrate, and a plurality of interlayer insulating layers and a plurality of cell gate electrodes alternately stacked along the main channel layers, wherein the pipe connection gate electrode includes a metal silicide layer formed within the groove. The electric resistance of the pipe connection gate electrode may be greatly reduced without an increase in a substantial height by forming the metal silicide layer buried in the substrate under the pipe connection gate electrode.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: September 8, 2015
    Assignee: SK Hynix Inc.
    Inventors: Min-Soo Kim, Young-Jin Lee, Jin-Hae Choi, Joo-Hee Han, Sung-Jin Whang, Byung-Ho Lee
  • Publication number: 20150249095
    Abstract: This technology relates to a nonvolatile memory device and a method of fabricating the same. The nonvolatile memory device may include a pipe connection gate electrode over a substrate, one or more pipe channel layers formed within the pipe connection gate electrode, pairs of main channel layers each coupled with the pipe channel layer and extended in a direction substantially perpendicular to the substrate, a plurality of interlayer insulating layers and a plurality of cell gate electrodes alternately stacked along the main channel layers, and etch stop layers including metal silicide and formed over the pipe connection gate electrode.
    Type: Application
    Filed: May 13, 2015
    Publication date: September 3, 2015
    Inventors: Min-Soo KIM, Young-Jin LEE, Jin-Hae CHOI, Joo-Hee HAN, Sung-Jin WHANG, Byung-Ho LEE
  • Publication number: 20150244479
    Abstract: An electronic device is provided. The electronic device includes a measurement module configured to measure received signal strength indications from a signal transmitted by access device that the electronic device is connected to, a generation module configured to generate correction data using at least some of the received signal strength indications, and a control module configured to control the communication connection of the electronic device based on a change in the correction data.
    Type: Application
    Filed: February 20, 2015
    Publication date: August 27, 2015
    Inventors: You-Na LEE, Yong-Hae CHOI
  • Publication number: 20150236039
    Abstract: This technology relates to a nonvolatile memory device and a method of fabricating the same. The nonvolatile memory device may include a pipe connection gate electrode configured to have a bottom buried in a groove formed in a substrate, one or more pipe channel layers formed within the pipe connection gate electrode, pairs of main channel layers each coupled to the pipe channel layer and extended in a direction substantially perpendicular to the substrate, and a plurality of interlayer insulating layers and a plurality of cell gate electrodes alternately stacked along the main channel layers, wherein the pipe connection gate electrode includes a metal silicide layer formed within the groove. The electric resistance of the pipe connection gate electrode may be greatly reduced without an increase in a substantial height by forming the metal silicide layer buried in the substrate under the pipe connection gate electrode.
    Type: Application
    Filed: April 30, 2015
    Publication date: August 20, 2015
    Inventors: Min-Soo KIM, Young-Jin LEE, Jin-Hae CHOI, Joo-Hee HAN, Sung-Jin WHANG, Byung-Ho LEE
  • Patent number: D735738
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: August 4, 2015
    Assignee: LG Electronics Inc.
    Inventors: Ji Young Hong, Gu Ang Jang, Jin Hae Choi, Kyung In Yang, Sung Il Cho
  • Patent number: D741880
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: October 27, 2015
    Assignee: LG Electronics Inc.
    Inventors: Ji Young Hong, Gu Ang Jang, Jin Hae Choi, Kyung In Yang, Sung Il Cho