Abstract: Provided is a composition for inhibiting fat formation and reducing body fat, the composition including hydrangenol as an active ingredient. The composition of the present disclosure reduces fat accumulation in adipocytes, reduces phosphorylation of mammalian target of rapamycin (mTOR), and increases phosphorylation of forkhead box O1 (FoxO1), and finally, leading to reduction of an expression level of peroxisome proliferator-activated receptor gamma ? (PPAR), and as a result, the composition inhibits formation of triglyceride in adipocytes to exhibit an anti-obesity effect. Accordingly, the composition including hydrangenol disclosed herein as an active ingredient may be usefully applied to the fields of health functional foods or cosmetics for inhibiting fat formation.

Abstract: A display device is provided. The display device includes a first pixel including a first light emission area, a second pixel adjacent to the first pixel in a column direction, and including a second light emission area, a transistor area overlapped with each of the first pixel and the second pixel, and coupled to the first light emission area and the second light emission area, and a light-transmissive area adjacent to the transistor area in a row direction crossing the column direction.

Abstract: Disclosed is a display device including a display panel including a plurality of pixels, a plurality of scan lines, and a scan driver. The plurality of pixels includes a first pixel, a second pixel, a third pixel, and a fourth pixel. The plurality of scan lines includes a first scan line, a second scan line, a third scan line, and a fourth scan line. The scan driver includes a plurality of stages that are respectively connected to the plurality of scan lines and outputs a plurality of scan signals. Active periods of scan signals of scan lines adjacent to each other among a plurality of scan lines do not overlap each other.

Abstract: A method of controlling an electric booster including a reaction disk, a boosting body and a pedal push rod connected to a pedal and configured to come into contact with the reaction disk, the electric booster being subjected to braking control according to a braking map, includes: a first braking control step of controlling and generating a reaction force at normal times in accordance with a pedal effort by compressing and expanding a fluid while moving the pedal push rod; and a second braking control step of controlling and generating the reaction force in accordance with the pedal effort only in a condition in which the reaction disk and the pedal push rod are in contact with each other by detecting a size of an air gap between the reaction disk and the pedal push rod.

Abstract: The present invention relates to a full analog phase shifter, and more particularly, comprises: a variable switch panel comprising a first conductive pattern terminal and a second conductive pattern terminal; and a pattern PCB on which a plurality of array antenna elements are arranged and a transmission line at which the first conductive pattern terminal and the second conductive pattern terminal come into contact is pattern-printed, wherein, assuming that two variable switch panels are disposed in the vertical direction, the two variable switch panels are provided as a slider type that slides in the vertical direction so that, due to a phase shift caused by the contact between the first conductive pattern terminal and the second conductive pattern terminal and the transmission line, phases of the plurality of array antenna elements are linearly distributed on a same reference phase plane, thereby providing the advantage of easily implementing a mirror symmetry structure having a linear phase distribution on

Abstract: A display device includes: a base layer in which a display area and a non-display area are defined; a circuit layer on the base layer; and an element layer on the circuit layer and including a light emitting element and a light receiving element corresponding to the display area, wherein the circuit layer includes: a pixel driving circuit connected to the light emitting element; a sensor driving circuit connected to the light receiving element; a read-out line connected to the sensor driving circuit; a data line connected to the pixel driving circuit; a driving voltage line connected to the pixel driving circuit; a reset voltage line connected to the sensor driving circuit; and a shielding electrode wiring electrically connected to the driving voltage line and overlapping the reset voltage line.

Abstract: A display device includes a pixel, a sensor including a sensor driving circuit and a sensing element, and a display panel in which a display area is defined. The display area includes a first area and a second area, the sensor driving circuit is connected to the sensing element and includes a reset transistor including a gate electrode that receives a reset control signal, the reset control signal includes a first reset control signal and a second reset control signal different from the first reset control signal, and the first reset control signal is provided to the reset transistor disposed in the first area, and the second reset control signal is provided to the reset transistor disposed in the second area.

Abstract: A light emitting display device includes a unit pixel group including first, second, third, and fourth unit pixels arranged in a 2×2 matrix, and each of the first, second, third, and fourth unit pixel includes a first light emitting region, a second light emitting region, and a third light emitting region that emit lights of three primary colors, respectively, wherein the first, second, and third light emitting regions of the first light emitting region are sequentially in a first diagonal direction, the first, second, third, and fourth light emitting regions of the second unit pixel are sequentially arranged in a second diagonal direction, and the first, second, and third light emitting regions of the third unit pixel are sequentially arranged in a third diagonal direction, and the first, second, and third light emitting regions of the fourth unit pixel are sequentially arranged in a four diagonal direction.

Abstract: A photomask according to an exemplary embodiment includes: a mask substrate; and a first test pattern and a second test pattern disposed along a first edge of the mask substrate, wherein the first test pattern has a first outer shape and a first inner shape, the second test pattern has a second outer shape, and the second outer shape of the second test pattern is larger than the first inner shape of the first test pattern and smaller than the first outer shape of the first test pattern.

Abstract: A display device includes a pixel including a first sub-pixel emitting light of a first color and a second sub-pixel emitting light of a second color. Each of the first sub-pixel and the second sub-pixel includes: a pixel circuit layer disposed on a substrate, the pixel circuit layer including a pixel circuit, and a display element layer disposed on the pixel circuit layer, the display element layer including a light emitting element which includes an anode electrode and a cathode electrode. The pixel circuit layer includes a first contact part disposed between the substrate and the display element layer, the anode electrode and the pixel circuit being connected to each other through the first contact part to supply an anode signal to the light emitting element. A plurality of first contact parts which include a first contact part in the first sub-pixel and a first contact part in the second sub-pixel are arranged along a first direction.

Abstract: A pixel circuit layer may include a first power line, a sensing line, a second power line, and a data line disposed spaced apart from each other in a first direction and extending in a second direction crossing the first direction, and a sensing control line disposed on one side of the first power line, the sensing line, the second power line, and the data line and extending in the first direction in a plan view. The sensing control line may include a first protrusion extending between the sensing line and the second power line and a second protrusion spaced apart from the first protrusion and extending between the second power line and the data line. The first protrusion may include gate electrodes of a third transistor of the first and second sub-pixels, and the second protrusion may include a gate electrode of a third transistor of the third sub-pixel.

Abstract: A display device includes: a first gate line including: a main line; and first and second auxiliary lines protruding from the main line; and first and second pixels, each including a first transistor. The first transistor of each of the first and second pixels includes: a first active region; a first drain electrode on one side of the first active region; a first source electrode on another side of the first active region; and a first gate electrode overlapping with the first active region. The first gate electrodes of the first and second pixels are respectively connected to the first and second auxiliary lines.

Abstract: Disclosed is a system for recovering lithium of a waste cathode material, including: a heat-treating unit configured to heat-treat a waste cathode material to convert into soluble and insoluble materials; a water-leaching unit configured to leach the heat-treated waste cathode material with water to separate into an insoluble material and a water-leached solution comprising a lithium ion and a carbonate ion; and an reverse osmosis (RO) concentration unit configured to concentrate the water-leached solution using reverse osmosis, and a concentration of a lithium ion in the water-leached solution which is separated from the water-leaching unit may be 2,000 ppm or less.

Abstract: A display device comprises a planarization layer disposed on a substrate, a first alignment electrode and a second alignment electrode that extend in a first direction and are spaced apart from each other on the planarization layer, a first insulating layer disposed on the first alignment electrode and the second alignment electrode and comprising a first opening exposing the planarization layer between the first alignment electrode and the second alignment electrode, a light-emitting element disposed on the planarization layer overlapping the first opening, a first contact electrode and a second contact electrode disposed on the first insulating layer, the first contact electrode electrically contacting a first end of the light-emitting element and the second contact electrode electrically contacting a second end of the light-emitting element, and a second insulating layer disposed on the light-emitting element.

Abstract: A tiled display includes: first and second display devices disposed adjacent to each other, the first and second display devices including display areas each having light-emitting areas, and a seam between adjacent ones of the display areas. Each of the first and second display devices includes: a first base part in the display areas, a first support layer on the first base part in the display areas and the seam, a display layer on the first support layer in the display areas and the seam, a second support layer on the display layer in the display areas and the seam, and a second base part on the second support layer in the display areas. The first support layer of the second display device is disposed on the second support layer of the first display device in the seam.

Abstract: A display device is disclosed that includes a substrate, first through fourth conductive layers, first through fourth insulating layers, a semiconductor layer, and a light emitting layer. The first conductive layer is disposed on the substrate and includes a first conductive pattern. The first insulating layer is disposed on the first conductive layer. The semiconductor layer is disposed on the first insulating layer and includes a first channel region and a capacitor pattern. The second insulating layer is disposed on the semiconductor layer. The second conductive layer is disposed on the second insulating layer and includes a first gate electrode overlapping the first channel region. The third insulating layer is disposed on the second conductive layer. The third conductive layer is disposed on the third insulating layer and includes a common electrode. The fourth insulating layer is disposed on the third conductive layer.

Abstract: Provided is a display device. The display device comprises: a substrate including a display area having a plurality of pixels and a non-display area, a plurality of data lines connected to each of the plurality of pixels and extending in a first direction, a plurality of first gate lines connected to each of the plurality of pixels and extending in a second direction crossing the first direction, a plurality of second gate lines extending along the first direction from one end of the display area to a line contact portion contacting each of the plurality of first gate lines, and a plurality of off voltage lines extending in a direction opposite to the first direction from the other end of the display area opposite to one end of the display area to a periphery of the line contact portion and insulated from the plurality of second gate lines.

Abstract: A femtosecond laser source according to an embodiment of the present invention includes: a pulse generator that converts a continuous wave laser into an optical pulse train; a burst generator that separates the optical pulse train into a plurality of burst pulses; a pulse amplification and spectral broadening unit that expands the spectrum by amplifying a plurality of burst pulses; and a pulse compressor that compresses a plurality of amplified burst pulses to generate a femtosecond laser with a pulse width of 1 picosecond (10?12 s) or less.

Abstract: The present invention relates to a full analog phase shifter and an antenna apparatus including same, and more particularly, comprises: a variable switch panel including a first conductive pattern terminal and a second conductive pattern terminal; and an antenna element substrate on which a plurality of array antenna elements are arranged and a transmission line being in contact with the first conductive pattern terminal and the second conductive pattern terminal is pattern-printed, wherein, due to a phase shift caused by contact points of the transmission line with respect to the first conductive pattern terminal and the second conductive pattern terminal, phases of the plurality of antenna elements are linearly array distributed on a same reference phase plane, thereby providing an advantage of easily implementing a mirror symmetry structure having a linear phase distribution only by a phase shift in an RF stage without phase conversion in a digital stage.

Abstract: The present invention provides a wafer processing apparatus for a combined high-pressure process and vacuum process, and a wafer processing method using decompression, the wafer treatment apparatus comprising: a process chamber having a processing area for processing a wafer; a gas supply module configured to supply a processing gas to the processing area for the processing area to reach a high-pressure state; gas exhaust module configured to exhaust the processing gas from the processing area for the processing area to reach a normal-pressure state; a gas intake module configured to suction residual gas in the processing gas from the processing area for the processing area to reach a vacuum state; and a control module configured to control the gas supply module, the gas exhaust module, and the gas intake module for the wafer processing to be performed under pressure changes from the high-pressure state through the normal-pressure state to the vacuum state.