Abstract: Disclosed herein is a semiconductor device including: a source electrode formed on one side of an N-type AlGaN layer; N-type and P-type AlGaN layers formed on the other side of the P-type AlGaN layer and formed in a direction perpendicular to the source electrode; a gate electrode formed on one side of the N-type and P-type AlGaN layers; and a drain electrode formed on the other side of the N-type and P-type AlGaN layers.

Abstract: There is provided a semiconductor device including: a first semiconductor region having a first conductivity type; a second semiconductor region having a second conductivity type and formed on one surface of the first semiconductor region; a third semiconductor region having a first conductivity type and formed on one surface of the second semiconductor region; a gate electrode formed in a trench penetrating through the second semiconductor region and the third semiconductor region to reach an interior of the first semiconductor region; and a hole injection unit formed between the gate electrode and the first semiconductor region.

Abstract: Disclosed herein is a semiconductor device including: a base substrate; a first nitride semiconductor layer formed on the base substrate; a second nitride semiconductor layer formed on the first nitride semiconductor layer; a cathode electrode formed on one side of the second nitride semiconductor layer; an anode electrode having one end and the other end, one end being recessed at the other side of the second nitride semiconductor layer up to a predetermined depth, and the other end being spaced apart from the cathode electrode and formed to be extended up to an upper portion of the cathode electrode; and an insulating film formed on the second nitride semiconductor layer between the anode electrode and the cathode electrode so as to cover the cathode electrode.

Abstract: Disclosed herein is a power semiconductor device including: a base substrate having one surface and the other surface and formed of a first conductive type drift layer; a first conductive type diffusion layer formed on one surface of the base substrate and having a concentration higher than that of the first conductive type drift layer; and a trench formed so as to penetrate through the second conductive type well layer and the first conductive type diffusion layer from one surface of the base substrate including the second conductive type well layer in a thickness direction.

Abstract: There is provided an insulated gate bipolar transistor, including: an active region including a gate electrode, a first emitter metal layer, a first well region, and one portion of a third well region; a termination region including a second well region supporting diffusion of a depletion layer; and a connection region located between the active region and the termination region and including a second emitter metal layer, a gate metal layer, and the other portion of the third well region, wherein the third well region is formed over the active region and the connection region, and the first emitter metal layer and the second emitter metal layer are formed on the third well region.

Abstract: Disclosed herein is a trench gate type power semiconductor device including: a semiconductor substrate; a drift layer formed on the semiconductor substrate; a well layer formed on the drift layer; trenches formed to arrive at the drift layer while penetrating through the well layer in a thickness direction; first insulating films formed from bottom surfaces of the trenches up to a predetermined height; first electrodes formed at a height lower than that of the first insulating films in the trenches; interlayer dielectrics formed up to the same height as that of the first insulating films in the trenches; and a second electrode formed on the well layer, a portion of the first surface corresponding to the trenches being protruded into the trenches to contact the interlayer dielectrics.

Abstract: Disclosed herein are a semiconductor device and a method for manufacturing the same, the semiconductor device including: trench gate electrodes formed in a semiconductor substrate; a gate insulating film covering an upper surface of the semiconductor substrate and lateral surfaces and lower surfaces of the trench gate electrodes; a base region formed between the trench gate electrodes; an emitter region formed between the trench gate electrodes and on the base region; interlayer insulating films formed on the trench gate electrodes and spaced apart from each other; an emitter metal layer formed on the interlayer insulating films and between the interlayer insulating films.

Abstract: The present invention relates to a subscriber station security-related parameter negotiation method in a wireless portable Internet system. The subscriber station security-related parameter negotiation method includes security-related parameters in transmitting/receiving basic capability negotiation request messages and basic capability negotiation response messages such that the subscriber station and the base station negotiate the subscriber station security-related parameters. The security-related parameters include an authorization policy support subfield used to negotiate an authorization policy between the subscriber station and the base station, and message authentication code mode subfields used to negotiate a message authentication code mode.

Abstract: Disclosed herein is a power semiconductor device including: a base substrate having one surface and the other surface and formed of a first conductive type drift layer; a first conductive type diffusion layer formed on one surface of the base substrate and having a concentration higher than that of the first conductive type drift layer; and a trench formed so as to penetrate through the second conductive type well layer and the first conductive type diffusion layer from one surface of the base substrate including the second conductive type well layer in a thickness direction.

Abstract: Disclosed herein are a semiconductor device, and a method for manufacturing the semiconductor device. The semiconductor device includes a semiconductor substrate, a base region formed on an upper region of an inside of the semiconductor substrate, at least one gate electrode that penetrates through the base region and has an inverted triangular shape, a gate insulating film formed to enclose an upper portion of the semiconductor substrate and the gate electrode, an inter-layer insulating film formed on an upper portion of the gate electrode and the gate insulating film, an emitter region formed inside the base region and on both sides of the gate electrode, an emitter metal layer formed on an upper portion of the base region and inter-layer insulating film, and a buffer region formed to enclose a lower portion of the gate electrode and to be spaced apart from the base region.

Abstract: A method and apparatus for performing a multiple Pre-Shared Key (PSK) based authentication in a single procedure is described, where the multiple PSK based authentication generates a combined credential in a terminal by using a plurality of credentials including a user identifier and the PSK, and authenticates the terminal in an authentication server by using the combined credential.

Abstract: Discussed are a color filter array substrate with sensing lines capable of sensing a user's touch, and a method for manufacturing the color filter array substrate, wherein the color filter array substrate comprises a plurality of first sensing electrodes at fixed intervals on a substrate; a plurality of second sensing electrodes respectively interposed between each of the first sensing electrodes, wherein each second sensing electrode is provided at a predetermined interval from each first sensing electrode; and a plurality of conductive black matrixes respectively overlapped with the plurality of first sensing electrodes, wherein the plurality of conductive black matrixes are formed to electrically connect the neighboring first sensing electrodes provided with the second sensing electrode interposed in-between.

Abstract: An LCD device includes a plurality of gate lines and data lines cross-arranged on a lower substrate to define a plurality of pixels, a pixel electrode disposed in each of the pixels, a plurality of common electrode blocks pattern-formed that generate an electric field with the pixel electrode and sensing a touch of a user, a plurality of sensing lines, a plurality of pad parts arranged to be separated from each other at predetermined intervals along a corresponding sensing line, and having a line width thicker than the sensing line, and a contact part disposed between a corresponding pad part and a corresponding common electrode block, and electrically connecting a corresponding sensing line and the common electrode block. When the sensing lines are electrically connected to one of the common electrode blocks, the sensing lines are electrically insulated from the other common electrode blocks.

Abstract: A method of manufacturing an array substrate for a fringe field switching mode liquid crystal display includes: forming an auxiliary insulating layer on a second passivation layer and having a first thickness; forming first and second photoresist patterns on the auxiliary insulating layer and having second and third thicknesses, respectively, the second thickness greater than the third thickness; etching the auxiliary insulating layer, the second passivation layer and a first passivation layer to form a drain contact hole; performing an ashing to remove the second photoresist pattern and expose the auxiliary insulating layer therebelow; performing a dry etching to remove the auxiliary insulating layer not covered by the first photoresist pattern and expose the first passivation layer and to form an insulating pattern below the first photoresist pattern, the insulating pattern and the first photoresist pattern forming an undercut shape; forming a transparent conductive material layer having a fourth thickness

Abstract: Disclosed is an underwater robot based on flapping comprising: an actuator including a smart material and directional material, wherein the smart material is changed in its shape according to an external signal, and the directional material restricts a deformation in a specific direction; a body connected with the actuator; and a controller which makes the actuator perform a first stroke in a direction, and a second stroke in another direction being different from that of the first stroke; wherein the actuator performs at least one deformation of bending and twisting according to position of the smart material and directionality of the directional material, and furthermore enables to simultaneously perform the smooth bending and twisting motion with the simple structure by adjusting the position of the smart material functioning as the active component, and the directionality of the directional material functioning as the passive component.

Abstract: Provided are a nonvolatile memory device and a method of operating the same. The nonvolatile memory device in accordance with an embodiment of the inventive concept may include a string select line; a ground select line; a dummy word line adjacent to the ground select line; a first word line adjacent to the dummy word line; and a second word line disposed between the string select line and the first word line. The nonvolatile memory device is configured to apply a voltage to the dummy word line. When programming a memory cell connected to the first word line, a first dummy word line voltage lower than a voltage applied to the second word line is applied to the dummy word line. When programming a memory cell connected to the second word line, a second dummy word line voltage between a voltage applied to the first word line and the first dummy word line voltage is applied to the dummy word line.

Abstract: A method of manufacturing an array substrate for a fringe field switching mode liquid crystal display includes: forming an auxiliary insulating layer having a first thickness; forming first and second photoresist patterns on the auxiliary insulating layer; performing an ashing to remove the second photoresist pattern and expose the auxiliary insulating layer therebelow; performing a dry etching to remove the auxiliary insulating layer not covered by the first photoresist pattern and expose a first passivation layer and to form an insulating pattern below the first photoresist pattern, the insulating pattern and the first photoresist pattern forming an undercut shape; forming a transparent conductive material layer having a fourth thickness less than the first thickness; and performing a lift-off process to remove the first photoresist pattern and the transparent conductive material layer thereon together and form a pixel electrode.

Abstract: An flash memory device includes a block of NAND cell units, each NAND cell unit in the block includes n memory cell transistors MC controlled by a plurality of n wordlines, and is connected in series between a string selection transistor SST connected to a bitline and a ground selection transistor GST. While a programming voltage Vpgm is applied to a selected wordline WL<i>, a cutoff voltage Vss is applied to a nearby unselected wordline closer to the ground selection transistor GST to isolate a first local channel Ch1 from a second local channel Ch2. As the location i of the selected wordline WL<i> increases close to the SST, the second channel potential Vch2 tends to increase excessively, causing errors.

Abstract: A method of manufacturing an array substrate for a fringe field switching mode liquid crystal display includes: forming an auxiliary insulating layer having a first thickness; forming first and second photoresist patterns on the auxiliary insulating layer; performing an ashing to remove the second photoresist pattern and expose the auxiliary insulating layer therebelow; performing a dry etching to remove the auxiliary insulating layer not covered by the first photoresist pattern and expose a first passivation layer and to form an insulating pattern below the first photoresist pattern, the insulating pattern and the first photoresist pattern forming an undercut shape; forming a transparent conductive material layer having a fourth thickness less than the first thickness; and performing a lift-off process to remove the first photoresist pattern and the transparent conductive material layer thereon together and form a pixel electrode.

Abstract: A wiring structure includes a first plug extending through a first insulating interlayer on a substrate, a first wiring extending through a second insulating interlayer on the first insulating interlayer and the first wiring is electrically connected to the first plug, a diffusion barrier layer pattern on the first wiring and on the second insulating interlayer, a portion of the second insulating interlayer being free of being covered by the diffusion barrier layer pattern, a second plug extending through the diffusion barrier layer pattern, the second plug is in contact with the first wiring, and a second wiring electrically connected to the second plug.