Abstract: Techniques and mechanisms described herein facilitate the storage of digital media recordings. According to various embodiments, a system is provided comprising a processor, a storage device, Random Access Memory (RAM), an archive writer, and a recording writer. The archive writer is configured to retrieve a plurality of small multimedia segments (SMSs) in RAM and write the plurality of SMSs into an archive container file in RAM. The single archive container file may correspond to a singular multimedia file when complete. New SMSs retrieved from RAM are appended into the archive container file if the new SMSs also correspond to the singular multimedia file. The recording writer is configured to flush the archive container file to be stored as a digital media recording on the storage device once enough SMSs have been appended by the archive writer to the archive container file to complete the singular multimedia file.

Abstract: An eye-tracking system, including at least one vertical capacitance sensor, configured to measure the vertical position of a cornea of a user’s eye by sensing a position of an eyelid of the user; and at least one horizontal capacitance sensor, configured to measure the horizontal position of the cornea of the user’s eye by sensing a position of the user’s eyeball.

Abstract: Provided herein may be a memory device and a memory system having the memory device. The memory system includes a memory device including a plurality of memory blocks, each including chunk blocks, and page buffer blocks respectively coupled to the chunk blocks, and a memory controller configured to, based on chunk block status information indicating whether each of the chunk blocks is one of a pass chunk block and a bad chunk block, control the memory device to perform an operation corresponding to a command on merged pass chunk blocks obtained by merging pass chunk blocks coupled to different page buffer blocks among pass chunk blocks included in memory blocks, each of the memory blocks including both the pass chunk block and the bad chunk block.

Abstract: An electroluminescent display device includes a display panel including a display region, which includes a plurality of pixel arrangement regions and a plurality of scan circuit regions between the plurality of pixel arrangement regions, and a non-display region around the display region; a scan driving circuit formed in the plurality of scan circuit regions, and a clock signal line transferring a clock signal, and a first voltage line and a second voltage line located at both sides of the clock signal line, the clock signal line and the first and second voltage lines being located in the scan circuit region, wherein the first voltage line transfers a low potential driving voltage which is supplied to a cathode corresponding to the display region.

Abstract: A deformed display device includes a display area including a plurality of pixel array areas in which a plurality of pixel array groups are arranged and a plurality of circuit areas in which a plurality of driving circuits are arranged, wherein the pixel array groups and the driving circuits form a pixel block; and a dummy area disposed at one side of the display area and including a plurality of dummy pixel array areas in which a plurality of dummy pixel array groups are arranged and a plurality of dummy circuit areas in which a plurality of dummy circuits are arranged, wherein the dummy pixel array groups and the dummy circuits do not form the pixel block.

Abstract: A memory device which can perform various memory tests without increasing a size of the memory device. The memory device includes: a first pad for receiving external ROM data from a memory controller; a second pad for receiving an external clock signal corresponding to the external ROM data from the memory controller; and a control logic connected to the first pad and the second pad and configured to perform an operation corresponding to the external ROM data in response to the external clock signal in a test mode.

Abstract: An analog-to-digital converter includes: a sample/hold circuit, which samples an analog signal, and outputs a first voltage; a digital-to-analog conversion circuit, which converts a digital signal to output a second voltage; an amplifier, which amplifies the first voltage and the second voltage; a noise shaping filter, which integrates a residual voltage corresponding to a difference between the amplified first voltage and the amplified second voltage, and generates a first integration voltage and a second integration voltage; a comparator, which compares a sum of the amplified first voltage, the first integration voltage, and the second integration voltage with the amplified second voltage; and a SAR logic, which outputs the digital signal according to a comparison result of the comparator, and controls the digital-to-analog conversion circuit.

Abstract: Fracture-induced composite sensors and methods of their fabrication are disclosed. The sensors can be used as strain sensors, piezo-resistive sensors, piezo-capacitive sensors, and non-contact displacement wearable sensors.

Abstract: The present disclosure relates to a novel PLK1 degradation inducing compound, a method for preparing the same, and the use thereof. The compounds of the present disclosure exhibit an effect of inducing PLK1 degradation. Therefore, the compounds of the present disclosure may be effectively utilized for preventing or treating PLK1-related diseases.

Abstract: The present disclosure relates to a novel PLK1 degradation inducing compound, a method for preparing the same, and the use thereof. The compounds of the present disclosure exhibit an effect of inducing PLK1 degradation. Therefore, the compounds of the present disclosure may be effectively utilized for preventing or treating PLK1-related diseases.

Abstract: An eye-tracking system, including at least one vertical capacitance sensor, configured to measure the vertical position of a cornea of a user's eye by sensing a position of an eyelid of the user; and at least one horizontal capacitance sensor, configured to measure the horizontal position of the cornea of the user's eye by sensing a position of the user's eyeball.

Abstract: Techniques and mechanisms described herein facilitate the management of digital rights for media content item presentation. According to various embodiments, a request for a content decryption key may be received at a media application implemented at a computing device. The request may be transmitted by a media content player implemented at the computing device. The request may be transmitted in accordance with a designated key exchange protocol. A license for an encrypted media content item corresponding with the requested content decryption key may be identified at the media application. Based on information included in the license, encrypted key material may be decrypted to create the requested content decryption key via a processor at the computing device. The requested content decryption key may be provided to the media content player.

Abstract: A capacitive sensor including an electrically conductive material, and a single electrode applied with positive potential, wherein the distance between the single electrode and the electrically conductive material determines the spherical radius for a proximity sensing range.

Abstract: The present invention relates to a composition for preventing or treating diseases caused by overexpression of chemokine CX3CL1 (fractalkine) comprising a death receptor 5 (DR5) inhibitor as an active ingredient, a method for preventing or treating diseases caused by overexpression of chemokine CX3CL1 comprising administering a DR5 expression or activity inhibitor to a patient in need of prevention or treatment of diseases caused by overexpression of chemokine CX3CL1 in a therapeutically effective amount, and a use for prevention or treatment of diseases caused by overexpression of chemokine CX3CL1 of a DR5 expression or activity inhibitor.

Abstract: A display device includes a gate line extending in a first direction, a left data line and a right data line extending in a second direction and crossing the gate line, and a plurality of sub-pixels arranged along the first and second directions, wherein the sub-pixels of a pixel row of the first direction are connected to a same gate line, and the sub-pixels of a pixel row of the second direction are alternately connected to the left data line and the right data line.

Abstract: An integrated circuit includes a test control circuit, a driving circuit, and a test detection circuit. The test control circuit generates a test command signal and a test address signal corresponding to a test operation. The driving circuit performs the test operation by utilizing a test internal voltage, which is generated based on the test command signal. The test detection circuit compares the test address signal with target address information to output the test internal voltage.

Abstract: Provided herein may be a memory device and a memory system having the memory device. The memory system includes a memory device including a plurality of memory blocks, each including chunk blocks, and page buffer blocks respectively coupled to the chunk blocks, and a memory controller configured to, based on chunk block status information indicating whether each of the chunk blocks is one of a pass chunk block and a bad chunk block, control the memory device to perform an operation corresponding to a command on merged pass chunk blocks obtained by merging pass chunk blocks coupled to different page buffer blocks among pass chunk blocks included in memory blocks, each of the memory blocks including both the pass chunk block and the bad chunk block.

Abstract: A storage device, and a method of operating the storage device, includes a plurality of memory devices configured to store peak power information including information about a plurality of peak power periods and information about IDs respectively corresponding to the plurality of peak power periods. The storage device also includes a memory controller configured to assign an ID to each of the plurality of memory devices and control the memory devices so that one or more memory devices having an identical ID corresponding to a target period, among the plurality of peak power periods, perform a memory operation at peak power.

Abstract: Disclosed is an apparatus and method with object detection. The method may include updating a pre-trained model based on sensing data of an image sensor, performing pseudo labeling using an interim model provided a respective training set, determining plural confidence thresholds based on an evaluation of the interim model, performing multiple trainings using the interim model and the generated pseudo labeled data, by applying the determined plural confidence thresholds to the multiple trainings, respectively, and generating an object detection model dependent on the performance of the multiple trainings, including generating an initial candidate object detection model when the interim model is the updated model.

Abstract: An integrated circuit includes a test counting circuit, a test information storage circuit, a sequence control circuit and a driving circuit. The test counting circuit generates a counting address signal. The test information storage circuit stores a test control value and outputs the test control value based on the counting address signal. The sequence control circuit changes an output sequence of the test control value based on a sequence control signal and outputs a final test control value based on the test control value or a target control value. The driving circuit performs a pre-set test operation based on the final test control value.