Patents by Inventor In Jae Chung

In Jae Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110297930
    Abstract: A TFT display panel having a high charge mobility and making it possible to obtain uniform electric characteristics with respect to a large-area display is provided as well as a manufacturing method thereof. A TFT display panel includes a gate electrode formed on an insulation substrate, a first gate insulting layer formed of SiNx on the gate electrode, a second gate insulting layer formed of SiOx on the first gate insulting layer, an oxide semiconductor layer formed to overlap the gate electrode and having a channel part, and a passivation layer formed of SiOx on the oxide semiconductor layer and the gate electrode, and the passivation layer includes a contact hole exposing the drain electrode. The contact hole has a shape in which the passivation layer of a portion directly exposed together with a metal occupies an area smaller than the upper passivation layer.
    Type: Application
    Filed: June 1, 2011
    Publication date: December 8, 2011
    Inventors: Seung-Ha CHOI, Kyoung-Jae Chung, Woo-Geun Lee
  • Publication number: 20110299024
    Abstract: Disclosed is an LCD device which facilitates to improve transmittance for each colored light by a design capable of realizing an optimal cell gap for each of sub-pixels, and a method for manufacturing the same. The LCD device comprises first and second substrates confronting each other; a liquid crystal layer between the first and second substrates; and first, second, and third sub-pixels, wherein a cell gap of the first sub-pixel is larger than a cell gap of the third sub-pixel.
    Type: Application
    Filed: June 2, 2011
    Publication date: December 8, 2011
    Inventors: Jung Il Lee, In Jae Chung, Kang Il Kim
  • Publication number: 20110290538
    Abstract: A connecting structure of PCB using an anisotropic conductive film according to the present invention having members connected to each other by heat-compression using the anisotropic conductive film including an insulating adhesive as a base material and conductive particles dispersed in the insulating adhesive, wherein at least any one of the members has a flexible property, and a surface roughness value (Ra) of the member having a flexible property is 0.1 to 5.0 ?m due to dents formed by heat-compression.
    Type: Application
    Filed: June 2, 2011
    Publication date: December 1, 2011
    Applicant: LG INNOTEK CO. LTD.
    Inventors: Chul-Jong HAN, Yoon-Jae CHUNG, Jong-Yoon JANG, Jeong-Beom PARK, Yong-Seok HAN, Sung-Uk CHOI, Il-Rae CHO, Hyuk-Soo MOON, Kyung-Joon LEE
  • Patent number: 8059143
    Abstract: A flat panel display device and a picture quality controlling method thereof is provided. The flat panel display device includes a display panel. A memory stores location information about a panel defect location on the display panel and a compensation value to be dispersed for a plurality of frame periods. A compensating part detects the data to be displayed at the panel defect location and adjusts the data to be displayed at the panel defect location with the compensation value from the memory.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: November 15, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: In Jae Chung, Jong Hee Hwang, Sun Young Kim
  • Publication number: 20110273648
    Abstract: A liquid crystal display device includes first and second substrates facing each other, wherein a pixel region is defined on the first and second substrates, first and second grooves formed on an inner surface of the first substrate, a gate line formed in the first groove along a direction, a common line formed in the second groove and parallel to the gate line, a data line crossing the gate line to define the pixel region, a thin film transistor connected to the gate line and the data line, and a light-shielding pattern of a black inorganic material and around the gate line, the data line and the common line.
    Type: Application
    Filed: May 4, 2011
    Publication date: November 10, 2011
    Applicant: LG Display Co., Ltd.
    Inventors: Jung-II LEE, In-Jae CHUNG, Kang-Il KIM, Gi-Sang HONG
  • Publication number: 20110267913
    Abstract: A program method of a semiconductor memory device may include precharging first bit lines, coupled to first strings, to increase a potential level of the first strings to a first potential level; programming memory cells of a selected word line, wherein the memory cells are coupled to second bit lines; pre-discharging the first bit lines to decrease a potential level of the word lines to a second potential level, wherein the second potential level is lower than the first potential level; and discharging the first bit lines and the word lines to a ground voltage after the pre-discharging.
    Type: Application
    Filed: April 28, 2011
    Publication date: November 3, 2011
    Inventor: Sung Jae CHUNG
  • Publication number: 20110261623
    Abstract: A method of erasing a semiconductor memory device comprises grouping a plurality of word lines of each memory block into at least two groups based on intensity of disturbance between neighboring word lines; performing an erase operation by applying a ground voltage to all word lines of a selected memory block and by applying an erase voltage to a well of the selected memory block; and first increasing the ground voltage of one group of the groups to a positive voltage during the erase operation.
    Type: Application
    Filed: April 27, 2011
    Publication date: October 27, 2011
    Inventors: Hea Jong YANG, Hee Youl Lee, Sung Jae Chung, Hyun Heo, Jeong Hyong Yi, Yong Dae Park
  • Patent number: 8030107
    Abstract: An electro-luminescent device includes a transparent substrate, a black matrix on the transparent substrate defining a plurality of spaces, a plurality of color representing layers each arranged in respective ones of the spaces, an overcoat layer on the black matrix and the color representing layers, a plurality of first electrodes disposed on the overcoat layer in a first direction with respect to the color representing layers, a phosphor layer formed on the plurality of first electrodes, an insulating film on the phosphor layer, and a plurality of second electrodes disposed on the insulating film in a second direction perpendicular to the first direction.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: October 4, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: In Jae Chung, Gee Sung Chae
  • Patent number: 8031522
    Abstract: Disclosed is a memory system and a method of programming a multi-bit flash memory device which includes memory cells configured to store multi-bit data, where the method includes and the system is configured for determining whether data to be stored in a selected memory cell is an LSB data; and if data to be stored in a selected memory cell is not an LSB data, backing up lower data stored in the selected memory cell to a backup memory block of the multi-bit flash memory device.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: October 4, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Ho Jang, In-Hwan Choi, Woon-Jae Chung, Song-Ho Yoon, Kyung-Wook Ye
  • Publication number: 20110235182
    Abstract: Provided are a reflective structure, a display apparatus including the reflective structure, and methods of manufacturing the reflective structure and the display apparatus. The reflective structure may include a reflective layer having a multiple uneven structure. The reflective layer may have a curved surface as a result of a plurality of first uneven portions, and wherein the curved surface may has a plurality of second uneven portions having a scale less than that of the first uneven portions. The plurality of first uneven portions may have a micro-scale size, and the plurality of second uneven portions may have a nano-scale size. The reflective layer may be arranged on a lower structure including a plurality of nanoparticles. A flexible material layer may be formed on the reflective layer.
    Type: Application
    Filed: August 11, 2010
    Publication date: September 29, 2011
    Applicants: Samsung Electronics Co., Ltd., Korea Advanced Institute of Science and Technology
    Inventors: Moon Gyu Han, Hong-seok Lee, Jung H. Shin, Kyung Jae Chung
  • Patent number: 8013876
    Abstract: This invention relates to a flat panel display device that is adaptive for optimizing data, which are to be displayed in a panel defect area, in used of a compensation value of a compensation circuit as well as compensating defect pixels by a repair process, and a method of controlling a picture quality thereof. A flat panel display device according to an embodiment of the present invention includes a display panel; a memory which stores a first compensation data, a second compensation data and a third compensation data; a first compensation part; a second compensation part; a third compensation part; and a driver for driving the display panel in use of the data modulated by the first to third compensation parts.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: September 6, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: In Jae Chung, Deuk Su Lee, Jong Hee Hwang
  • Patent number: 8014207
    Abstract: A nonvolatile memory device includes an encoder configured to perform a scramble operation on input data, a digital sum value (DSV) generator configured to generate a DSV indicating a difference between a number of data ‘0’ and a number of data ‘1’ in the input data encoded by the encoder, a main cell unit of a page of a memory cell array, wherein the main cell unit is configured to store the input data encoded by the encoder, a spare cell unit of the page, wherein the spare cell unit is configured to store the DSV generated by the DSV generator, and a read voltage setting unit configured to determine a read voltage for the page by comparing a DSV generated from the stored data of the main cell unit and the stored DSV of the spare cell unit.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: September 6, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Seung Han Ryu, Joong Seob Yang, Seung Jae Chung
  • Publication number: 20110198603
    Abstract: Disclosed are a thin film transistor and a method of forming the thin film transistor. The thin film transistor includes a gate electrode, an oxide semiconductor pattern, a first gate insulating layer pattern interposed between the gate electrode and the oxide semiconductor pattern, wherein the first gate insulating layer pattern has an island shape or has two portions of different thicknesses from each other, a source electrode and a drain electrode electrically connected to the oxide semiconductor pattern, wherein the source electrode and the drain electrode are separated from each other, and a first insulating layer pattern placed between the source electrode and drain electrode and the oxide semiconductor pattern, wherein the first insulating layer pattern partially contacts the source electrode and drain electrode and the first gate insulating layer pattern, and wherein the first insulating layer is enclosed by an outer portion.
    Type: Application
    Filed: October 12, 2010
    Publication date: August 18, 2011
    Inventors: SEUNG-HA CHOI, Kyoung-Jae Chung, Young-Wook Lee
  • Publication number: 20110193076
    Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.
    Type: Application
    Filed: December 1, 2010
    Publication date: August 11, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Pil-Sang YUN, Ki-Won KIM, Hye-Young RYU, Woo-Geun LEE, Seung-Ha CHOI, Jae-Hyoung YOUN, Kyoung-Jae CHUNG, Young-Wook LEE, Je-Hun LEE, Kap-Soo YOON, Do-Hyun KIM, Dong-Ju YANG, Young-Joo CHOI
  • Patent number: 7993417
    Abstract: A connecting structure of PCB using an anisotropic conductive film according to the present invention having members connected to each other by heat-compression using the anisotropic conductive film including an insulating adhesive as a base material and conductive particles dispersed in the insulating adhesive, wherein at least any one of the members has a flexible property, and a surface roughness value (Ra) of the member having a flexible property is 0.1 to 5.0 ?m due to dents formed by heat-compression.
    Type: Grant
    Filed: January 22, 2007
    Date of Patent: August 9, 2011
    Assignee: LS Cable Ltd.
    Inventors: Chul-Jong Han, Yoon-Jae Chung, Jong-Yoon Jang, Jeong-Beom Park, Yong-Seok Han, Sung-Uk Choi, Il-Rae Cho, Hyuk-Soo Moon, Kyung-Joon Lee
  • Patent number: 7990356
    Abstract: A flat panel display, a fabricating method thereof, a fabricating apparatus thereof, a picture quality controlling method thereof and a picture quality controlling apparatus for reducing a recognizing degree of a defective pixel and electrically compensating a charging characteristics of the defective pixel are provided. In the flat panel display, a display panel has a plurality of pixels. A defective pixel is electrically connected to an adjacent normal pixel. A memory stores a location data that indicates a location of the link pixel and a compensation data that compensates for charging characteristics of the link pixel. A compensation circuit modulates a digital video data to be displayed on the link pixel on the basis of the location data and the compensation data.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: August 2, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: In Jae Chung, Soon Sung Yoo, Seung Hee Nam, Deuk Su Lee, Jong Hee Hwang
  • Patent number: 7978681
    Abstract: An apparatus, system, and method for discovering a path MTU in a data communication network, wherein a path MTU option header is included in a signal message or first data packet and thus a MTU suitable for a routing path can be determined. A network apparatus for discovering a path MTU maximum transmission unit (MTU) in a data communication network, including a MTU-comparing unit MTU-comparer detecting a path MTU recorded on a predetermined packet transferred over a routing path between a source node and a destination node and comparing the detected path MTU with an internal MTU stored in the MTU-comparing unit MTU-comparer; and an event-processing unit event-processor updating the path MTU recorded on the predetermined packet to contain the internal MTU if the detected path MTU is larger than the internal MTU.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: July 12, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woon-jae Chung, Byung-in Mun, Rajesh Patharkar
  • Publication number: 20110148562
    Abstract: Disclosed is a field coil assembly of an electromagnetic clutch including a bobbin from which lead wires, which are both ends of a coil made of an aluminum-based material, protrude outward, a core that surrounds the bobbin such that the lead wires are exposed, a bobbin terminal installed at the bobbin while being adjacent to the lead wire of the coil, and a connector coupled to the core and including a lead wire terminal. The lead wires of the coil are connected to the bobbin terminal through heating and pressing.
    Type: Application
    Filed: December 20, 2010
    Publication date: June 23, 2011
    Inventors: Sung-Taeg OH, Seong-Gyu Gong, Suk-Jae Chung, Seung-Kil Kim, Chung-Han Shin, Jong-Myung Seok, Dae-Yong Park
  • Patent number: 7957191
    Abstract: A method of programming a non-volatile memory device includes applying a power supply voltage to a drain select line, applying a high level voltage to a drain-side pass word line or a source-side pass word line, and applying a pass voltage to unselected word lines and a program voltage to a selected word line. The high level voltage is applied to the drain-side pass word line or the source-side pass word line before applying the pass voltage to the unselected word lines and the program voltage to the selected word line.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: June 7, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sung Jae Chung
  • Publication number: 20110116108
    Abstract: A control method of an image forming apparatus which is connected to an external apparatus, supports a resource saving mode, and outputs document data is provided. The control method includes: selecting the document data to be output, selecting an output option to be applied to the selected document data, comparing a resource saving value corresponding to the output option to be applied to the document data and a resource saving set value which is pre-set in the image forming apparatus, displaying at least one suggestion option to save resources of the document data according to a result of comparison, and selecting one of the displayed suggestion option and outputting the document data.
    Type: Application
    Filed: June 21, 2010
    Publication date: May 19, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kwang-Soo Ha, Sung-Jae Chung, Bong-Gun Kim, Sang-Su Lee, Sung-Man Shin