Patents by Inventor In Jung YANG
In Jung YANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145806Abstract: A battery module includes battery cells stacked along one direction; a heat conducting member that transfers heat generated from the battery cells to the outside; and an insulating member surrounding the heat conducting member. At least one or more of the battery cells form a battery cell group, and at least one battery cell group is stacked to form a battery cell stack.Type: ApplicationFiled: November 3, 2022Publication date: May 2, 2024Applicant: LG ENERGY SOLUTION, LTD.Inventors: Jung Hoon LEE, Dooseung KIM, Jaehun YANG
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Patent number: 11969397Abstract: The present invention relates to a composition for preventing or treating transplantation rejection or a transplantation rejection disease, comprising a novel compound and a calcineurin inhibitor. A co-administration of the present invention 1) reduces the activity of pathogenic Th1 cells or Th17 cells, 2) increases the activity of Treg cells, 3) has an inhibitory effect against side effects, such as tissue damage, occurring in the sole administration thereof, 4) inhibits various pathogenic pathways, 5) inhibits the cell death of inflammatory cells, and 6) increases the activity of mitochondria, in an in vivo or in vitro allogenic model, a transplantation rejection disease model, a skin transplantation model, and a liver-transplanted patient, and thus inhibits transplantation rejection along with mitigating side effects possibly occurring in the administration of a conventional immunosuppressant alone.Type: GrantFiled: November 7, 2019Date of Patent: April 30, 2024Assignee: THE CATHOLIC UNIVERSITY OF KOREA INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Mi-La Cho, Dong-Yun Shin, Jong-Young Choi, Chul-Woo Yang, Sung-Hwan Park, Seon-Yeong Lee, Min-Jung Park, Joo-Yeon Jhun, Se-Young Kim, Hyeon-Beom Seo, Jae-Yoon Ryu, Keun-Hyung Cho
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Publication number: 20240136213Abstract: In an embodiment, a system, includes: a first pressurized load port interfaced with a workstation body; a second pressurized load port interfaced with the workstation body; the workstation body maintained at a set pressure level, wherein the workstation body comprises an internal material handling system configured to move a semiconductor workpiece within the workstation body between the first and second pressurized load ports at the set pressure level; a first modular tool interfaced with the first pressurized load port, wherein the first modular tool is configured to process the semiconductor workpiece; and a second modular tool interfaced with the second pressurized load port, wherein the second modular tool is configured to inspect the semiconductor workpiece processed by the first modular tool.Type: ApplicationFiled: January 3, 2024Publication date: April 25, 2024Inventors: Chun-Jung HUANG, Yung-Lin HSU, Kuang Huan HSU, Jeff CHEN, Steven HUANG, Yueh-Lun YANG
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Publication number: 20240133949Abstract: An outlier IC detection method includes acquiring first measured data of a first IC set, training the first measured data for establishing a training model, acquiring second measured data of a second IC set, generating predicted data of the second IC set by using the training model according to the second measured data, generating a bivariate dataset distribution of the second IC set according to the predicted data and the second measured data, acquiring a predetermined Mahalanobis distance on the bivariate dataset distribution of the second IC set, and identifying at least one outlier IC from the second IC set when at least one position of the at least one outlier IC on the bivariate dataset distribution is outside a range of the predetermined Mahalanobis distance.Type: ApplicationFiled: October 3, 2023Publication date: April 25, 2024Applicant: MEDIATEK INC.Inventors: Yu-Lin Yang, Chin-Wei Lin, Po-Chao Tsao, Tung-Hsing Lee, Chia-Jung Ni, Chi-Ming Lee, Yi-Ju Ting
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Patent number: 11968840Abstract: A thin film transistor includes an active layer located over a substrate, a first gate stack including a stack of a first gate dielectric and a first gate electrode and located on a first surface of the active layer, a pair of first contact electrodes contacting peripheral portions of the first surface of the active layer and laterally spaced from each other along a first horizontal direction by the first gate electrode, a second contact electrode contacting a second surface of the active layer that is vertically spaced from the first surface of the active layer, and a pair of second gate stacks including a respective stack of a second gate dielectric and a second gate electrode and located on a respective peripheral portion of a second surface of the active layer.Type: GrantFiled: November 10, 2021Date of Patent: April 23, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Yong-Jie Wu, Yen-Chung Ho, Hui-Hsien Wei, Chia-Jung Yu, Pin-Cheng Hsu, Feng-Cheng Yang, Chung-Te Lin
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Patent number: 11963969Abstract: Provided is a pharmaceutical composition including gastrodin and a use thereof for the prevention or the treatment of amyotrophic lateral sclerosis. The pharmaceutical composition is effective in reducing neuronal axon degeneration and neurofibromin accumulation, improving symptoms of amyotrophic lateral sclerosis and extending life of patients of amyotrophic lateral sclerosis.Type: GrantFiled: September 16, 2022Date of Patent: April 23, 2024Assignee: BUDDHIST TZU CHI MEDICAL FOUNDATIONInventors: Chia-Yu Chang, Shinn-Zong Lin, Hsiao-Chien Ting, Hui-I Yang, Horng-Jyh Harn, Hong-Lin Su, Ching-Ann Liu, Yu-Shuan Chen, Tzyy-Wen Chiou, Tsung-Jung Ho
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Patent number: 11968908Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.Type: GrantFiled: June 30, 2022Date of Patent: April 23, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tai-Yen Peng, Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang, Qiang Fu, Chen-Jung Wang
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Publication number: 20240120281Abstract: A display device comprises a display panel substrate and a glass substrate over said display panel substrate, wherein said display panel substrate comprises multiple contact pads, a display area, a first boundary, a second boundary, a third boundary and a fourth boundary, wherein said display area comprises a first edge, a second edge, a third edge and a fourth edge, wherein said first boundary is parallel to said third boundary and said first and third edges, wherein said second boundary is parallel to said fourth boundary and said second and fourth edges, wherein a first least distance between said first boundary and said first edge, wherein a second least distance between said second boundary and said second edge, a third least distance between said third boundary and said third edge, a fourth distance between said fourth boundary and said fourth edge, and wherein said first, second, third and fourth least distances are smaller than 100 micrometers, and wherein said glass substrate comprising multiple metaType: ApplicationFiled: November 30, 2023Publication date: April 11, 2024Inventor: Ping-Jung Yang
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Publication number: 20240115706Abstract: The present disclosure pertains to a GUCY2C-binding polypeptide and uses thereof and, specifically, to a GUCY2C-binding polypeptide, a fusion protein including same, a chimeric antigen receptor, an immune cell expressing the chimeric antigen receptor, and a use thereof for treatment and/or diagnosis of cancer.Type: ApplicationFiled: April 7, 2022Publication date: April 11, 2024Applicant: LG CHEM, LTD.Inventors: Youngkyun KIM, Jung Youn SHIN, Yeongrim KO, Soyeon YANG, Beom Ju HONG, Eunhye CHOI, Nakyoung LEE
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Publication number: 20240120313Abstract: A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive ring-like structure over and electrically insulated from the chip. The conductive ring-like structure surrounds a central region of the chip. The chip package structure includes a first solder structure over the conductive ring-like structure. The first solder structure and the conductive ring-like structure are made of different materials.Type: ApplicationFiled: December 18, 2023Publication date: April 11, 2024Inventors: Sheng-Yao YANG, Ling-Wei LI, Yu-Jui WU, Cheng-Lin HUANG, Chien-Chen LI, Lieh-Chuan CHEN, Che-Jung CHU, Kuo-Chio LIU
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Patent number: 11952412Abstract: The present invention provides a recombinant exosome and uses thereof. More particularly, the present invention provides a recombinant exosome wherein a phagocytosis promoting protein is presented on the surface of the exosome.Type: GrantFiled: April 3, 2022Date of Patent: April 9, 2024Assignee: SHIFTBIOInventors: Eun-ee Koh, Eun Jung Lee, Yoo Soo Yang, In-San Kim
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Patent number: 11955660Abstract: This application relates to a separator for a lithium secondary battery, a method for manufacturing a separator for a lithium secondary battery, and a lithium secondary battery including same. The separator includes a porous substrate, a heat resistant layer positioned on at least one surface of the porous substrate and including inorganic particles, and a first adhesive layer positioned on the heat resistant layer and including a first organic polymer. The heat resistant layer includes the inorganic particles of 90 wt % to 99 wt % on the basis of total weight, the thickness of the heat resistant layer is 3.5 ?m to 7 ?m, and the thickness of the first adhesive layer is 0.5 ?m to 3.0 ?m.Type: GrantFiled: March 27, 2019Date of Patent: April 9, 2024Assignees: SAMSUNG SDI CO., LTD., SAMSUNG ELECTRONICS CO., LTD.Inventors: Jungsue Jang, Byungmin Lee, Hana Kim, Myungkook Park, Seung Rim Yang, Bokyung Jung, Minho Cho
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Publication number: 20240110170Abstract: The present disclosure relates to a modified polypeptide having xylanase activity and the use thereof.Type: ApplicationFiled: December 15, 2021Publication date: April 4, 2024Applicant: CJ CHEILJEDANG CORPORATIONInventors: Tae Joo YANG, Jihyun SHIM, Eun Jung CHOI, Byung-sam SON, Jae Yong PARK
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Publication number: 20240108813Abstract: The present invention relates to a medicament delivery device comprising a housing, a compartment inside said housing for positioning a medicament container, an injection needle arranged to said housing, being connectable to said medicament container for delivering a dose of medicament, a manually operated activation mechanism for activating said device, an actuation mechanism operably connected to said activation mechanism and arranged to, upon activation of said activation mechanism, extend said injection needle from a first position inside said housing to a second position wherein a penetration of a patient is performed, a plunger rod arranged in said housing capable of acting on said medicament container for delivering a dose of medicament through said injection needle, a driver capable of acting on said plunger rod for delivering a dose of medicament.Type: ApplicationFiled: December 11, 2023Publication date: April 4, 2024Inventors: Eugen Koch, Cheng-Jung Yang, Laura Scholze
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Publication number: 20240111848Abstract: An example electronic device includes a display, a communication circuit, a memory, and at least one processor configured to, based on a signal for requesting transmission of identification information including a call word for using first mode of an artificial intelligence assistant function of the electronic device being received, from another electronic device, through the communication circuit using first communication method, control the display to display a user interface for requesting user confirmation for transmission of the identification information; control the communication circuit to transmit the identification information to the another electronic device as a result of user confirmation through the user interface; and receive information for using a second communication method from the another electronic device.Type: ApplicationFiled: December 8, 2023Publication date: April 4, 2024Inventors: Chang-bae YOON, Jeong-in KIM, Se-won OH, Hyo-young CHO, Kyung-rae KIM, Hee-jung KIM, Hyun-jin YANG, Ji-won CHA
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Patent number: 11939408Abstract: Skin hydration is necessary to maintain the epidermal barrier, minimize adverse environmental influences, and reduce cell stress. Provided herein are compounds, such as compounds of Formula (I), and pharmaceutically and cosmetically acceptable salts thereof, and compositions, methods, and uses that may be used for skin hydration. Also reported herein is a scalable method for synthesizing compounds of Formula (I). The compounds provided herein are responsible for improved skin penetration and/or retention and are therefore useful for the treatment and/or prevention of various diseases, disorders, or conditions to protect human skin.Type: GrantFiled: December 18, 2020Date of Patent: March 26, 2024Assignee: Massachusetts Institute of TechnologyInventors: Bradley David Olsen, Allie Obermeyer, Sieun Kim Barnes, Yun Jung Yang
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Patent number: 11942396Abstract: A heterogeneous integration semiconductor package structure including a heat dissipation assembly, multiple chips, a package assembly, multiple connectors and a circuit substrate is provided. The heat dissipation assembly has a connection surface and includes a two-phase flow heat dissipation device and a first redistribution structure layer embedded in the connection surface. The chips are disposed on the connection surface of the heat dissipation assembly and electrically connected to the first redistribution structure layer. The package assembly surrounds the chips and includes a second redistribution structure layer disposed on a lower surface and multiple conductive vias electrically connected to the first redistribution structure layer and the second redistribution structure layer. The connectors are disposed on the package assembly and electrically connected to the second redistribution structure layer.Type: GrantFiled: December 29, 2021Date of Patent: March 26, 2024Assignee: Industrial Technology Research InstituteInventors: Heng-Chieh Chien, Shu-Jung Yang, Yu-Min Lin, Chih-Yao Wang, Yu-Lin Chao
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Patent number: 11937971Abstract: Provided is a method for classifying diseases using artificial intelligence (AI) of an electronic apparatus. The method for classifying diseases may comprise obtaining auscultation sound data and auscultation position data, obtaining feature information based on the auscultation sound data and obtaining auscultation position information based on the auscultation position data, generating combined information by combining the feature information and the auscultation position information, and identifying at least one of disease information corresponding to the combined information, by using an AI model.Type: GrantFiled: May 5, 2023Date of Patent: March 26, 2024Assignee: SMARTSOUND CORPORATIONInventors: Jung Ho Lee, Won Yang Cho, Eun Joo Lee
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Patent number: 11942145Abstract: The present disclosure describes a method for memory cell placement. The method can include placing a memory cell region in a layout area and placing a well pick-up region and a first power supply routing region along a first side of the memory cell region. The method also includes placing a second power supply routing region and a bitline jumper routing region along a second side of the memory cell region, where the second side is on an opposite side to that of the first side. The method further includes placing a device region along the second side of the memory cell region, where the bitline jumper routing region is between the second power supply routing region and the device region.Type: GrantFiled: May 6, 2022Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chih-Chuan Yang, Jui-Wen Chang, Feng-Ming Chang, Kian-Long Lim, Kuo-Hsiu Hsu, Lien Jung Hung, Ping-Wei Wang
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Patent number: D1024051Type: GrantFiled: August 10, 2021Date of Patent: April 23, 2024Assignee: Acer IncorporatedInventors: Hui-Jung Huang, Hong-Kuan Li, I-Lun Li, Ling-Mei Kuo, Kuan-Ju Chen, Fang-Ying Huang, Kai-Hung Huang, Szu-Wei Yang, Kai-Teng Cheng