Patents by Inventor In Jung Yu

In Jung Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145404
    Abstract: A chip package with electromagnetic interference (EMI) shielding layer and a method of manufacturing the same are provided. The chip package includes a chip, a redistribution layer (RDL), an insulating layer, and an electromagnetic interference (EMI) shielding layer. A peripheral wall is formed around at least one first opening of the insulating layer for enclosing the first opening and a flat portion is disposed around the peripheral wall while a level of the flat portion is lower than a level of the peripheral wall. The flat portion of the insulating layer is covered with the EMI shielding layer which is isolated and electrically insulated from a pad in the first opening by the peripheral wall of the insulating layer. Thereby problems of the chip including fast increase in temperature and electromagnetic interference can be solved effectively.
    Type: Application
    Filed: September 8, 2023
    Publication date: May 2, 2024
    Inventors: HONG-CHI YU, CHUN-JUNG LIN, RUEI-TING GU
  • Publication number: 20240140944
    Abstract: The present invention relates to a novel naphthyridinone derivative compound, a pharmaceutically acceptable salt thereof, a hydrate thereof, or a stereoisomer thereof, which are each relevant to a compound for inhibiting ENPP1, a composition for inhibiting ENPP1, and a method for inhibiting ENPP1.
    Type: Application
    Filed: December 29, 2021
    Publication date: May 2, 2024
    Applicant: TXINNO BIOSCIENCE INC.
    Inventors: Seo Jung Han, Chan Sun Park, Sung Joon Kim, Jae Eun Cheong, Jung Hwan Choi, Ali Imran, Sun Woo Lee, Yong Yea Park, Ah Ran Yu, Sun Young Park
  • Publication number: 20240139331
    Abstract: The present invention relates to a pharmaceutical composition, for treating glioblastoma, comprising a nucleic acid complex as an active ingredient and, more particularly, to a pharmaceutical composition, for preventing or treating glioblastoma, comprising a nucleic acid complex having complementarily bound: a bioactive peptide nucleic acid having a sequence binding to TGF-?2 gene; and a carrier peptide nucleic acid. The nucleic acid complex according to the present invention has excellent cell permeability and intracellular activity and can effectively inhibit the expression of TGF-?2 gene and the hypostatic gene thereof, and thus is useful in preventing or treating glioblastoma.
    Type: Application
    Filed: December 14, 2021
    Publication date: May 2, 2024
    Inventors: Min-Jung PARK, Hye Joo KIM, Ji-Yeon YU, Hee Kyung PARK
  • Publication number: 20240139688
    Abstract: A polymeric hollow fiber membrane is provided having a crosslinked selective layer formed by sequentially performing coating of a polymer precursor on a crosslinked polymeric hollow fiber membrane support and thermal condensation and thermal crosslinking thereof, a carbon molecular sieve hollow fiber membrane, methods for producing the same, and methods of separating gases using the same. The polymeric hollow fiber membrane and the carbon molecular sieve hollow fiber membrane each have a thin crosslinked selective layer and excellent plasticization resistance and separation performance. Accordingly, the polymeric hollow fiber membrane and the carbon molecular sieve hollow fiber membrane, each of which has a thin crosslinked selective layer, can be effectively used in the separation of a mixed gas.
    Type: Application
    Filed: October 4, 2023
    Publication date: May 2, 2024
    Inventors: Jong Suk LEE, Hyun Jung YU, Heseong AN, Ju Ho SHIN
  • Publication number: 20240140925
    Abstract: A method for manufacturing a low-viscosity hardener is provided. The method includes the followings steps: providing a hardener crude product; and subjecting the hardener crude product and an alkaline catalyst to an isomerization reaction, so as to obtain the low-viscosity hardener. The hardener crude product contains 3-methyltetrahydrophthalic anhydride and 4-methyltetrahydrophthalic anhydride, and a weight ratio of the 3-methyltetrahydrophthalic anhydride to the 4-methyltetrahydrophthalic anhydride ranges from 7:3 to 3:7. A viscosity of the low-viscosity hardener ranges from 30 cps to 50 cps.
    Type: Application
    Filed: January 11, 2023
    Publication date: May 2, 2024
    Inventors: TE-CHAO LIAO, JUNG-JEN CHUANG, CHUNG-YU CHEN, JUNG-TSU WU
  • Publication number: 20240140900
    Abstract: A method for manufacturing methyltetrahydrophthalic anhydride is provided, which includes steps as follows. Maleic anhydride is added into a reactor. Piperylene is added into the reactor, so that the piperylene and the maleic anhydride undergo a first addition reaction. When a conversion rate of the maleic anhydride is more than 25%, the first addition reaction is completed. Isoprene is added into the reactor, so that the isoprene and the maleic anhydride undergo a second addition reaction to obtain a methyltetrahydrophthalic anhydride product. The methyltetrahydrophthalic anhydride product contains 3-methyltetrahydrophthalic anhydride and 4-methyltetrahydrophthalic anhydride.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 2, 2024
    Inventors: TE-CHAO LIAO, JUNG-JEN CHUANG, CHUNG-YU CHEN, JUNG-TSU WU
  • Publication number: 20240140765
    Abstract: An overhead hoist transfer apparatus includes a rail assembly including a straight rail having an empty section, and a curved rail having a curved empty section; an engine including a first LSD having first and second wheels at two sides respectively; and a second LSD having third and fourth wheels at two sides respectively; a moving carriage driven by the engine and suspended from the rail assembly; first and second guide wheels disposed on the first LSD; third and fourth guide wheels disposed on the second LSD; and two guide boards disposed above a joining point of the straight rail and the curved rail. An elevation of the guide boards is equal to that of the guide wheels. The guide board includes a straight edge and a curved edge.
    Type: Application
    Filed: September 27, 2023
    Publication date: May 2, 2024
    Inventors: Jung-Chieh Chang, Yi-Sheng Chen, Jen-Yung Hsiao, Chia-Fu Hsiao, Wei-Qi Lao, Chen-Chih Chan, Caung-Yu Liu
  • Publication number: 20240136261
    Abstract: A semiconductor package includes: a first redistribution substrate; a semiconductor chip provided on the first redistribution substrate; a molding material molding the semiconductor chip and the first redistribution substrate; and a second redistribution substrate provided on the molding material, wherein the second redistribution substrate includes: at least one redistribution line; a metal pad; and a dielectric layer molding the at least one redistribution line and the metal pad, wherein the dielectric layer includes a marking region on the metal pad, and the metal pad includes a plurality of concave portions.
    Type: Application
    Filed: May 30, 2023
    Publication date: April 25, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: SEUNGWAN SHIN, JUNGHOON KANG, BYUNGMIN YU, JUNG HYUN LEE
  • Patent number: 11968840
    Abstract: A thin film transistor includes an active layer located over a substrate, a first gate stack including a stack of a first gate dielectric and a first gate electrode and located on a first surface of the active layer, a pair of first contact electrodes contacting peripheral portions of the first surface of the active layer and laterally spaced from each other along a first horizontal direction by the first gate electrode, a second contact electrode contacting a second surface of the active layer that is vertically spaced from the first surface of the active layer, and a pair of second gate stacks including a respective stack of a second gate dielectric and a second gate electrode and located on a respective peripheral portion of a second surface of the active layer.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yong-Jie Wu, Yen-Chung Ho, Hui-Hsien Wei, Chia-Jung Yu, Pin-Cheng Hsu, Feng-Cheng Yang, Chung-Te Lin
  • Publication number: 20240128232
    Abstract: A semiconductor package includes a first semiconductor die, an encapsulant, a high-modulus dielectric layer and a redistribution structure. The first semiconductor die includes a conductive post in a protective layer. The encapsulant encapsulates the first semiconductor die, wherein the encapsulant is made of a first material. The high-modulus dielectric layer extends on the encapsulant and the protective layer, wherein the high-modulus dielectric layer is made of a second material. The redistribution structure extends on the high-modulus dielectric layer, wherein the redistribution structure includes a redistribution dielectric layer, and the redistribution dielectric layer is made of a third material. The protective layer is made of a fourth material, and a ratio of a Young's modulus of the second material to a Young's modulus of the fourth material is at least 1.5.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Ding Wang, Yen-Fu Su, Hao-Cheng Hou, Jung-Wei Cheng, Chien-Hsun Lee, Hsin-Yu Pan
  • Publication number: 20240128217
    Abstract: A semiconductor device includes a first semiconductor die and a second semiconductor die connected to the first semiconductor die. Each of the first semiconductor die and the second semiconductor die includes a substrate, a conductive bump formed on the substrate and a conductive contact formed on the conductive bump. The conductive contact has an outer lateral sidewall, there is an inner acute angle included between the outer lateral sidewall and the substrate is smaller than 85°, and the conductive contact of the first semiconductor die is connected opposite to the conductive contact of the second semiconductor die.
    Type: Application
    Filed: January 20, 2023
    Publication date: April 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Jung CHEN, Chen Chiang YU, Wei-An TSAO, Tsung-Fu TSAI, Szu-Wei LU, Chung-Shi LIU
  • Patent number: 11961811
    Abstract: A semiconductor structure includes a semiconductor element and a first bonding structure. The semiconductor element has a first surface and a second surface opposite to the first surface. The first bonding structure is disposed adjacent to the first surface of the semiconductor element, and includes a first electrical connector, a first insulation layer surrounding the first electrical connector and a first conductive layer surrounding the first insulation layer.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Hung-Jui Kuo, Hui-Jung Tsai, Tsao-Lun Chang
  • Publication number: 20240116707
    Abstract: A powered industrial truck includes a lateral movement assembly including four sliding members and four pivotal members both on a wheeled carriage, four links having a first end pivotably secured to the sliding member and a second end pivotably secured to either end of the pivotal member, a motor shaft having two ends pivotably secured to the pivotal members respectively, a first electric motor on one frame member, and four mounts attached to the sliding members respectively; two lift assemblies including a second electric motor, a shaft having two ends rotatably secured to the sliding members respectively, two gear trains at the ends of the shaft respectively, a first gear connected to the second electric motor, a second gear on the shaft, and a first roller chain on the first and second gears; two electric attachments on the platform and being laterally moveable, each attachment. The mount has rollers.
    Type: Application
    Filed: September 21, 2023
    Publication date: April 11, 2024
    Inventors: Jung-Chieh Chang, Yi-Sheng Chen, Jen-Yung Hsiao, Chia-Fu Hsiao, Wei-Qi Lao, Chen-Chih Chan, Chung-Yu Liu
  • Publication number: 20240120300
    Abstract: A chip package which includes a glass fiber substrate made of FR-4 fiberglass is provided. The chip package further includes a substrate pad which is a stacked metal structure with a certain thickness and composed of a nickel layer, a palladium layer, and a gold layer, or a nickel layer and a gold layer stacked over at least one first circuit layer in turn. A total thickness of the substrate pad is 3.15-5.4 ?m. The glass fiber substrate and the substrate pad can bear positive pressure generated during wire bonding. Thereby at least one solder joint is formed on the substrate pad precisely and integrally. This helps reduction in material cost for manufacturers.
    Type: Application
    Filed: September 8, 2023
    Publication date: April 11, 2024
    Inventors: HONG-CHI YU, CHUN-JUNG LIN, RUEI-TING GU
  • Publication number: 20240119213
    Abstract: A method includes designing a plurality of cells for a semiconductor device, wherein designing the plurality of cells comprises reserving a routing track of a plurality of routing tracks within each of the plurality of cells, wherein each of the plurality of cells comprises signal lines, and the reserved routing track is free of the signal lines. The method includes placing a first cell and a second cell of the plurality of cells in a layout of the semiconductor device. The method includes determining whether any power rails overlap with any of the plurality of routing tracks other than the reserved routing track in the second cell. The method includes adjusting a distance between the first cell and the second cell in response to a determination that at least one power rail overlaps with at least one routing track other than the reserved routing track.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Inventors: Jian-Sing LI, Jung-Chan YANG, Ting Yu CHEN, Ting-Wei CHIANG
  • Publication number: 20240116092
    Abstract: A wafer adsorption device has a base, a guiding ring, and a cover. An inlet is formed through the base. The guiding ring is mounted on the base and includes a ring body and multiple bumps, the bumps protrude from a top surface of the ring body and are spaced from each other. Multiple flow channels are recessed from a surface of the cover, and each one of the flow channels is arc-shaped. An end of each one of the flow channels is connected to each other and fluidly communicates to the inlet, and another end extends outward. The cover is mounted in the ring body and securely mounted on the base, and the cover is spaced apart from the guiding ring. Therefore, when placing a wafer on the wafer adsorption device, a contacting area of the wafer may be reduced to further reduce a probability of scratching.
    Type: Application
    Filed: September 14, 2023
    Publication date: April 11, 2024
    Inventors: Hsin-Jung PENG, Tsung-che Yu
  • Patent number: 11951571
    Abstract: A method of forming a package structure includes an etching step, a laser step, a plating step and a singulation step. In the etching step, a plurality of cutting streets of a leadframe are etched. In the laser step, a plastic package material covering on each of the cutting streets is removed via a laser beam. In the plating step, a plurality of plating surfaces are disposed on a plurality of areas of the leadframe without the plastic package material. In the singulation step, the cutting streets of the leadframe are cut to form the package structure.
    Type: Grant
    Filed: February 2, 2023
    Date of Patent: April 9, 2024
    Assignee: INTEGRATED SILICON SOLUTION INC.
    Inventors: Cheng-Fu Yu, Kai-Jih Shih, Yi-Jung Liu
  • Patent number: 11948798
    Abstract: A method for manufacturing an integrated circuit includes patterning a plurality of photomask layers over a substrate, partially backfilling the patterned plurality of photomask layers with a first material using atomic layer deposition, completely backfilling the patterned plurality of photomask layers with a second material using atomic layer deposition, removing the plurality of photomask layers to form a masking structure comprising at least one of the first and second materials, and transferring a pattern formed by the masking structure to the substrate and removing the masking structure. The first material includes a silicon dioxide, silicon carbide, or carbon material, and the second material includes a metal oxide or metal nitride material.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu Chang, Jung-Hau Shiu, Jen Hung Wang, Tze-Liang Lee
  • Publication number: 20240105901
    Abstract: In an embodiment, a device includes: an interconnect structure including a first contact pad, a second contact pad, and an alignment mark; a light emitting diode including a cathode and an anode, the cathode connected to the first contact pad; an encapsulant encapsulating the light emitting diode; a first conductive via extending through the encapsulant, the first conductive via including a first seed layer, the first seed layer contacting the second contact pad; a second conductive via extending through the encapsulant, the second conductive via including a second seed layer, the first seed layer and the second seed layer including a first metal; and a hardmask layer between the second seed layer and the alignment mark, the hardmask layer including a second metal, the second metal different from the first metal.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Inventors: Chen-Hua Yu, Keng-Han Lin, Hung-Jui Kuo, Hui-Jung Tsai
  • Patent number: D1022213
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: April 9, 2024
    Assignee: QUANTA COMPUTER INC.
    Inventors: Barry Lam, Chia-Yuan Chang, Jung-Wen Chang, Kao-Yu Hsu